269 	      RREG32_SOC15(VCN, 0, mmUVD_STATUS)))  in vcn_v2_0_hw_fini()
491 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
498 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
500 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_GATE);  in vcn_v2_0_disable_clock_gating()
521 	WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);  in vcn_v2_0_disable_clock_gating()
523 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
544 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
547 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE);  in vcn_v2_0_disable_clock_gating()
572 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);  in vcn_v2_0_disable_clock_gating()
574 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v2_0_disable_clock_gating()
585 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v2_0_disable_clock_gating()
651 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
658 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
660 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
681 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
683 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v2_0_enable_clock_gating()
694 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v2_0_enable_clock_gating()
716 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_disable_static_power_gating()
717 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS,  in vcn_v2_0_disable_static_power_gating()
730 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_disable_static_power_gating()
731 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0,  0xFFFFF);  in vcn_v2_0_disable_static_power_gating()
737 	data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_v2_0_disable_static_power_gating()
743 	WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_v2_0_disable_static_power_gating()
755 		data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_v2_0_enable_static_power_gating()
758 		WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_v2_0_enable_static_power_gating()
772 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_v2_0_enable_static_power_gating()
784 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFF);  in vcn_v2_0_enable_static_power_gating()
968 	WREG32_SOC15(VCN, 0, mmUVD_MPC_CNTL, tmp);  in vcn_v2_0_start()
1000 	tmp = RREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET);  in vcn_v2_0_start()
1003 	WREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET, tmp);  in vcn_v2_0_start()
1139 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7);  in vcn_v2_0_stop()
1147 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);  in vcn_v2_0_stop()
1152 	tmp = RREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2);  in vcn_v2_0_stop()
1154 	WREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2, tmp);  in vcn_v2_0_stop()
1158 	r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp);  in vcn_v2_0_stop()
1182 	WREG32_SOC15(VCN, 0, mmUVD_STATUS, 0);  in vcn_v2_0_stop()
1275 	return (RREG32_SOC15(VCN, 0, mmUVD_STATUS) == UVD_STATUS__IDLE);  in vcn_v2_0_is_idle()
1283 	ret = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,  in vcn_v2_0_wait_for_idle()