874 				   struct amdgpu_ib *ib,  in sdma_v4_0_ring_emit_ib()  argument
885 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v4_0_ring_emit_ib()
886 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v4_0_ring_emit_ib()
887 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v4_0_ring_emit_ib()
1616 	struct amdgpu_ib ib;  in sdma_v4_0_ring_test_ib()  local
1630 	memset(&ib, 0, sizeof(ib));  in sdma_v4_0_ring_test_ib()
1632 					AMDGPU_IB_POOL_DIRECT, &ib);  in sdma_v4_0_ring_test_ib()
1636 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v4_0_ring_test_ib()
1638 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v4_0_ring_test_ib()
1639 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v4_0_ring_test_ib()
1640 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0);  in sdma_v4_0_ring_test_ib()
1641 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v4_0_ring_test_ib()
1642 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1643 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1644 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1645 	ib.length_dw = 8;  in sdma_v4_0_ring_test_ib()
1647 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v4_0_ring_test_ib()
1665 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v4_0_ring_test_ib()
1683 static void sdma_v4_0_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v4_0_vm_copy_pte()  argument
1689 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v4_0_vm_copy_pte()
1691 	ib->ptr[ib->length_dw++] = bytes - 1;  in sdma_v4_0_vm_copy_pte()
1692 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v4_0_vm_copy_pte()
1693 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v4_0_vm_copy_pte()
1694 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v4_0_vm_copy_pte()
1695 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v4_0_vm_copy_pte()
1696 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_copy_pte()
1711 static void sdma_v4_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v4_0_vm_write_pte()  argument
1717 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v4_0_vm_write_pte()
1719 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v4_0_vm_write_pte()
1720 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_write_pte()
1721 	ib->ptr[ib->length_dw++] = ndw - 1;  in sdma_v4_0_vm_write_pte()
1723 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v4_0_vm_write_pte()
1724 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v4_0_vm_write_pte()
1741 static void sdma_v4_0_vm_set_pte_pde(struct amdgpu_ib *ib,  in sdma_v4_0_vm_set_pte_pde()  argument
1747 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE);  in sdma_v4_0_vm_set_pte_pde()
1748 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v4_0_vm_set_pte_pde()
1749 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_set_pte_pde()
1750 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v4_0_vm_set_pte_pde()
1751 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v4_0_vm_set_pte_pde()
1752 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v4_0_vm_set_pte_pde()
1753 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v4_0_vm_set_pte_pde()
1754 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v4_0_vm_set_pte_pde()
1755 	ib->ptr[ib->length_dw++] = 0;  in sdma_v4_0_vm_set_pte_pde()
1756 	ib->ptr[ib->length_dw++] = count - 1; /* number of entries */  in sdma_v4_0_vm_set_pte_pde()
1765 static void sdma_v4_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v4_0_ring_pad_ib()  argument
1771 	pad_count = (-ib->length_dw) & 7;  in sdma_v4_0_ring_pad_ib()
1774 			ib->ptr[ib->length_dw++] =  in sdma_v4_0_ring_pad_ib()
1778 			ib->ptr[ib->length_dw++] =  in sdma_v4_0_ring_pad_ib()
2641 static void sdma_v4_0_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v4_0_emit_copy_buffer()  argument
2647 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v4_0_emit_copy_buffer()
2650 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v4_0_emit_copy_buffer()
2651 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v4_0_emit_copy_buffer()
2652 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v4_0_emit_copy_buffer()
2653 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v4_0_emit_copy_buffer()
2654 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v4_0_emit_copy_buffer()
2655 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v4_0_emit_copy_buffer()
2668 static void sdma_v4_0_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v4_0_emit_fill_buffer()  argument
2673 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v4_0_emit_fill_buffer()
2674 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v4_0_emit_fill_buffer()
2675 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v4_0_emit_fill_buffer()
2676 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v4_0_emit_fill_buffer()
2677 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v4_0_emit_fill_buffer()