Lines Matching full:gart
439 * Set the location of vram, gart, and AGP in the GPU's
512 * vram and gart within the GPU's physical address space (VI).
588 /* set the gart size */ in gmc_v8_0_mc_init()
651 * GART
658 * gmc_v8_0_flush_gpu_tlb - gart tlb flush callback
820 * gmc_v8_0_gart_enable - gart enable
836 if (adev->gart.bo == NULL) { in gmc_v8_0_gart_enable()
837 dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); in gmc_v8_0_gart_enable()
844 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); in gmc_v8_0_gart_enable()
946 DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n", in gmc_v8_0_gart_enable()
949 adev->gart.ready = true; in gmc_v8_0_gart_enable()
957 if (adev->gart.bo) { in gmc_v8_0_gart_init()
958 WARN(1, "R600 PCIE GART already initialized\n"); in gmc_v8_0_gart_init()
961 /* Initialize common gart structure */ in gmc_v8_0_gart_init()
965 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v8_0_gart_init()
966 adev->gart.gart_pte_flags = AMDGPU_PTE_EXECUTABLE; in gmc_v8_0_gart_init()
971 * gmc_v8_0_gart_disable - gart disable