217  * GART
230 	/* Use register 17 for GART */  in gmc_v10_0_flush_vm_hub()
305  * gmc_v10_0_flush_gpu_tlb - gart tlb flush callback
374 	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);  in gmc_v10_0_flush_gpu_tlb()
770  * vram and gart within the GPU's physical address space.
802 	/* set the gart size */  in gmc_v10_0_mc_init()
831 	if (adev->gart.bo) {  in gmc_v10_0_gart_init()
832 		WARN(1, "NAVI10 PCIE GART already initialized\n");  in gmc_v10_0_gart_init()
836 	/* Initialize common gart structure */  in gmc_v10_0_gart_init()
841 	adev->gart.table_size = adev->gart.num_gpu_pages * 8;  in gmc_v10_0_gart_init()
842 	adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_NV10(MTYPE_UC) |  in gmc_v10_0_gart_init()
971  * Tears down the driver GART/VM setup (CIK).
1010  * gmc_v10_0_gart_enable - gart enable
1019 	if (adev->gart.bo == NULL) {  in gmc_v10_0_gart_enable()
1020 		dev_err(adev->dev, "No VRAM object for PCIE GART.\n");  in gmc_v10_0_gart_enable()
1049 	DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",  in gmc_v10_0_gart_enable()
1051 		 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo));  in gmc_v10_0_gart_enable()
1053 	adev->gart.ready = true;  in gmc_v10_0_gart_enable()
1084  * gmc_v10_0_gart_disable - gart disable