3612 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));  in gfx10_kiq_set_resources()
3631 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));  in gfx10_kiq_map_queues()
3657 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));  in gfx10_kiq_unmap_queues()
3684 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));  in gfx10_kiq_query_status()
3702 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));  in gfx10_kiq_invalidate_tlbs()
3835 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v10_0_write_data_to_reg()
3848 	amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in gfx_v10_0_wait_reg_mem()
3889 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in gfx_v10_0_ring_test_ring()
3934 	ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);  in gfx_v10_0_ring_test_ib()
4425 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v10_0_get_csb_buffer()
4428 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v10_0_get_csb_buffer()
4436 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in gfx_v10_0_get_csb_buffer()
4449 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));  in gfx_v10_0_get_csb_buffer()
4453 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v10_0_get_csb_buffer()
4456 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v10_0_get_csb_buffer()
6253 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v10_0_cp_gfx_start()
6256 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v10_0_cp_gfx_start()
6264 						  PACKET3(PACKET3_SET_CONTEXT_REG,  in gfx_v10_0_cp_gfx_start()
6276 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));  in gfx_v10_0_cp_gfx_start()
6280 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v10_0_cp_gfx_start()
6283 	amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v10_0_cp_gfx_start()
6286 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in gfx_v10_0_cp_gfx_start()
6303 		amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v10_0_cp_gfx_start()
8597 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2);  in gfx_v10_0_ring_emit_ib_gfx()
8599 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in gfx_v10_0_ring_emit_ib_gfx()
8644 		amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));  in gfx_v10_0_ring_emit_ib_compute()
8649 	amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));  in gfx_v10_0_ring_emit_ib_compute()
8667 	amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));  in gfx_v10_0_ring_emit_fence()
8711 		amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in gfx_v10_0_ring_emit_vm_flush()
8725 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v10_0_ring_emit_fence_kiq()
8734 		amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v10_0_ring_emit_fence_kiq()
8745 	amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v10_0_ring_emit_sb()
8778 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v10_0_ring_emit_cntxcntl()
8787 	amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));  in gfx_v10_0_ring_emit_init_cond_exec()
8867 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));  in gfx_v10_0_ring_emit_ce_meta()
8901 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));  in gfx_v10_0_ring_emit_de_meta()
8926 	amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));  in gfx_v10_0_ring_emit_frame_cntl()
8935 	amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));  in gfx_v10_0_ring_emit_rreg()
8963 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v10_0_ring_emit_wreg()
9344 	amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));  in gfx_v10_0_emit_mem_sync()
9375 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
9430 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
9466 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),