226 				  struct amdgpu_ib *ib,  in cik_sdma_ring_emit_ib()  argument
236 	amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */  in cik_sdma_ring_emit_ib()
237 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff);  in cik_sdma_ring_emit_ib()
238 	amdgpu_ring_write(ring, ib->length_dw);  in cik_sdma_ring_emit_ib()
670 	struct amdgpu_ib ib;  in cik_sdma_ring_test_ib()  local
684 	memset(&ib, 0, sizeof(ib));  in cik_sdma_ring_test_ib()
686 					AMDGPU_IB_POOL_DIRECT, &ib);  in cik_sdma_ring_test_ib()
690 	ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE,  in cik_sdma_ring_test_ib()
692 	ib.ptr[1] = lower_32_bits(gpu_addr);  in cik_sdma_ring_test_ib()
693 	ib.ptr[2] = upper_32_bits(gpu_addr);  in cik_sdma_ring_test_ib()
694 	ib.ptr[3] = 1;  in cik_sdma_ring_test_ib()
695 	ib.ptr[4] = 0xDEADBEEF;  in cik_sdma_ring_test_ib()
696 	ib.length_dw = 5;  in cik_sdma_ring_test_ib()
697 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in cik_sdma_ring_test_ib()
715 	amdgpu_ib_free(adev, &ib, NULL);  in cik_sdma_ring_test_ib()
732 static void cik_sdma_vm_copy_pte(struct amdgpu_ib *ib,  in cik_sdma_vm_copy_pte()  argument
738 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY,  in cik_sdma_vm_copy_pte()
740 	ib->ptr[ib->length_dw++] = bytes;  in cik_sdma_vm_copy_pte()
741 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in cik_sdma_vm_copy_pte()
742 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in cik_sdma_vm_copy_pte()
743 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in cik_sdma_vm_copy_pte()
744 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in cik_sdma_vm_copy_pte()
745 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_copy_pte()
759 static void cik_sdma_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in cik_sdma_vm_write_pte()  argument
765 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE,  in cik_sdma_vm_write_pte()
767 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in cik_sdma_vm_write_pte()
768 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_write_pte()
769 	ib->ptr[ib->length_dw++] = ndw;  in cik_sdma_vm_write_pte()
771 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in cik_sdma_vm_write_pte()
772 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in cik_sdma_vm_write_pte()
789 static void cik_sdma_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in cik_sdma_vm_set_pte_pde()  argument
794 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0);  in cik_sdma_vm_set_pte_pde()
795 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in cik_sdma_vm_set_pte_pde()
796 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in cik_sdma_vm_set_pte_pde()
797 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in cik_sdma_vm_set_pte_pde()
798 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in cik_sdma_vm_set_pte_pde()
799 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in cik_sdma_vm_set_pte_pde()
800 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in cik_sdma_vm_set_pte_pde()
801 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in cik_sdma_vm_set_pte_pde()
802 	ib->ptr[ib->length_dw++] = 0;  in cik_sdma_vm_set_pte_pde()
803 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in cik_sdma_vm_set_pte_pde()
813 static void cik_sdma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in cik_sdma_ring_pad_ib()  argument
819 	pad_count = (-ib->length_dw) & 7;  in cik_sdma_ring_pad_ib()
822 			ib->ptr[ib->length_dw++] =  in cik_sdma_ring_pad_ib()
826 			ib->ptr[ib->length_dw++] =  in cik_sdma_ring_pad_ib()
1317 static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib,  in cik_sdma_emit_copy_buffer()  argument
1323 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);  in cik_sdma_emit_copy_buffer()
1324 	ib->ptr[ib->length_dw++] = byte_count;  in cik_sdma_emit_copy_buffer()
1325 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in cik_sdma_emit_copy_buffer()
1326 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in cik_sdma_emit_copy_buffer()
1327 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in cik_sdma_emit_copy_buffer()
1328 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in cik_sdma_emit_copy_buffer()
1329 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in cik_sdma_emit_copy_buffer()
1342 static void cik_sdma_emit_fill_buffer(struct amdgpu_ib *ib,  in cik_sdma_emit_fill_buffer()  argument
1347 	ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, 0);  in cik_sdma_emit_fill_buffer()
1348 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in cik_sdma_emit_fill_buffer()
1349 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in cik_sdma_emit_fill_buffer()
1350 	ib->ptr[ib->length_dw++] = src_data;  in cik_sdma_emit_fill_buffer()
1351 	ib->ptr[ib->length_dw++] = byte_count;  in cik_sdma_emit_fill_buffer()