592 static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx,  in amdgpu_vce_validate_bo()  argument
603 	addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) |  in amdgpu_vce_validate_bo()
604 	       ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32;  in amdgpu_vce_validate_bo()
642 static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,  in amdgpu_vce_cs_reloc()  argument
653 	addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) |  in amdgpu_vce_cs_reloc()
654 	       ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32;  in amdgpu_vce_cs_reloc()
675 	amdgpu_set_ib_value(p, ib_idx, lo, lower_32_bits(addr));  in amdgpu_vce_cs_reloc()
676 	amdgpu_set_ib_value(p, ib_idx, hi, upper_32_bits(addr));  in amdgpu_vce_cs_reloc()
727 int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)  in amdgpu_vce_ring_parse_cs()  argument
729 	struct amdgpu_ib *ib = &p->job->ibs[ib_idx];  in amdgpu_vce_ring_parse_cs()
744 		uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);  in amdgpu_vce_ring_parse_cs()
745 		uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);  in amdgpu_vce_ring_parse_cs()
755 			fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6);  in amdgpu_vce_ring_parse_cs()
756 			bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7);  in amdgpu_vce_ring_parse_cs()
760 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 10,  in amdgpu_vce_ring_parse_cs()
765 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 12,  in amdgpu_vce_ring_parse_cs()
772 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3,  in amdgpu_vce_ring_parse_cs()
779 			tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4);  in amdgpu_vce_ring_parse_cs()
780 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, idx + 2,  in amdgpu_vce_ring_parse_cs()
787 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, idx + 2,  in amdgpu_vce_ring_parse_cs()
794 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3,  in amdgpu_vce_ring_parse_cs()
799 			r = amdgpu_vce_validate_bo(p, ib_idx, idx + 8,  in amdgpu_vce_ring_parse_cs()
810 		uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);  in amdgpu_vce_ring_parse_cs()
811 		uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);  in amdgpu_vce_ring_parse_cs()
815 			handle = amdgpu_get_ib_value(p, ib_idx, idx + 2);  in amdgpu_vce_ring_parse_cs()
826 			fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6);  in amdgpu_vce_ring_parse_cs()
827 			bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7);  in amdgpu_vce_ring_parse_cs()
842 			*size = amdgpu_get_ib_value(p, ib_idx, idx + 8) *  in amdgpu_vce_ring_parse_cs()
843 				amdgpu_get_ib_value(p, ib_idx, idx + 10) *  in amdgpu_vce_ring_parse_cs()
872 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9,  in amdgpu_vce_ring_parse_cs()
877 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 12, idx + 11,  in amdgpu_vce_ring_parse_cs()
888 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,  in amdgpu_vce_ring_parse_cs()
895 			tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4);  in amdgpu_vce_ring_parse_cs()
896 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,  in amdgpu_vce_ring_parse_cs()
903 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2,  in amdgpu_vce_ring_parse_cs()
910 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3,  in amdgpu_vce_ring_parse_cs()
915 			r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 8,  in amdgpu_vce_ring_parse_cs()
963 int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx)  in amdgpu_vce_ring_parse_cs_vm()  argument
965 	struct amdgpu_ib *ib = &p->job->ibs[ib_idx];  in amdgpu_vce_ring_parse_cs_vm()
974 		uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);  in amdgpu_vce_ring_parse_cs_vm()
975 		uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);  in amdgpu_vce_ring_parse_cs_vm()
985 			handle = amdgpu_get_ib_value(p, ib_idx, idx + 2);  in amdgpu_vce_ring_parse_cs_vm()