77 	/* Direct submission to the ring buffer during init and reset. */
100 	/* sync_seq is protected by ring emission lock */
112 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
114 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
117 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
124 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, struct amdgpu_job *job,
126 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
128 bool amdgpu_fence_process(struct amdgpu_ring *ring);
129 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
130 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
133 unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
139 /* provided by hw blocks that expose a ring buffer for commands */
149 	/* ring read/write ptr handling */
150 	u64 (*get_rptr)(struct amdgpu_ring *ring);
151 	u64 (*get_wptr)(struct amdgpu_ring *ring);
152 	void (*set_wptr)(struct amdgpu_ring *ring);
160 	void (*emit_ib)(struct amdgpu_ring *ring,
164 	void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
166 	void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
167 	void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vmid,
169 	void (*emit_hdp_flush)(struct amdgpu_ring *ring);
170 	void (*emit_gds_switch)(struct amdgpu_ring *ring, uint32_t vmid,
175 	int (*test_ring)(struct amdgpu_ring *ring);
176 	int (*test_ib)(struct amdgpu_ring *ring, long timeout);
178 	void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
179 	void (*insert_start)(struct amdgpu_ring *ring);
180 	void (*insert_end)(struct amdgpu_ring *ring);
182 	void (*pad_ib)(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
183 	unsigned (*init_cond_exec)(struct amdgpu_ring *ring);
184 	void (*patch_cond_exec)(struct amdgpu_ring *ring, unsigned offset);
186 	void (*begin_use)(struct amdgpu_ring *ring);
187 	void (*end_use)(struct amdgpu_ring *ring);
188 	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
189 	void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
190 	void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg,
192 	void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
193 	void (*emit_reg_wait)(struct amdgpu_ring *ring, uint32_t reg,
195 	void (*emit_reg_write_reg_wait)(struct amdgpu_ring *ring,
198 	void (*emit_frame_cntl)(struct amdgpu_ring *ring, bool start,
200 	/* Try to soft recover the ring to make the fence signal */
201 	void (*soft_recovery)(struct amdgpu_ring *ring, unsigned vmid);
202 	int (*preempt_ib)(struct amdgpu_ring *ring);
203 	void (*emit_mem_sync)(struct amdgpu_ring *ring);
204 	void (*emit_wave_limit)(struct amdgpu_ring *ring, bool enable);
214 	volatile uint32_t	*ring;  member
282 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
283 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
284 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
285 void amdgpu_ring_commit(struct amdgpu_ring *ring);
286 void amdgpu_ring_undo(struct amdgpu_ring *ring);
287 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
291 void amdgpu_ring_fini(struct amdgpu_ring *ring);
292 void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring,
295 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,
298 static inline void amdgpu_ring_set_preempt_cond_exec(struct amdgpu_ring *ring,  in amdgpu_ring_set_preempt_cond_exec()  argument
301 	*ring->cond_exe_cpu_addr = cond_exec;  in amdgpu_ring_set_preempt_cond_exec()
304 static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)  in amdgpu_ring_clear_ring()  argument
307 	while (i <= ring->buf_mask)  in amdgpu_ring_clear_ring()
308 		ring->ring[i++] = ring->funcs->nop;  in amdgpu_ring_clear_ring()
312 static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)  in amdgpu_ring_write()  argument
314 	if (ring->count_dw <= 0)  in amdgpu_ring_write()
315 		DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");  in amdgpu_ring_write()
316 	ring->ring[ring->wptr++ & ring->buf_mask] = v;  in amdgpu_ring_write()
317 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_write()
318 	ring->count_dw--;  in amdgpu_ring_write()
321 static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,  in amdgpu_ring_write_multiple()  argument
327 	if (unlikely(ring->count_dw < count_dw))  in amdgpu_ring_write_multiple()
328 		DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");  in amdgpu_ring_write_multiple()
330 	occupied = ring->wptr & ring->buf_mask;  in amdgpu_ring_write_multiple()
331 	dst = (void *)&ring->ring[occupied];  in amdgpu_ring_write_multiple()
332 	chunk1 = ring->buf_mask + 1 - occupied;  in amdgpu_ring_write_multiple()
343 		dst = (void *)ring->ring;  in amdgpu_ring_write_multiple()
347 	ring->wptr += count_dw;  in amdgpu_ring_write_multiple()
348 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_write_multiple()
349 	ring->count_dw -= count_dw;  in amdgpu_ring_write_multiple()
352 int amdgpu_ring_test_helper(struct amdgpu_ring *ring);
355 			     struct amdgpu_ring *ring);
356 void amdgpu_debugfs_ring_fini(struct amdgpu_ring *ring);