57 	struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);  in amdgpu_bo_destroy()  local
59 	amdgpu_bo_kunmap(bo);  in amdgpu_bo_destroy()
61 	if (bo->tbo.base.import_attach)  in amdgpu_bo_destroy()
62 		drm_prime_gem_destroy(&bo->tbo.base, bo->tbo.sg);  in amdgpu_bo_destroy()
63 	drm_gem_object_release(&bo->tbo.base);  in amdgpu_bo_destroy()
64 	amdgpu_bo_unref(&bo->parent);  in amdgpu_bo_destroy()
65 	kvfree(bo);  in amdgpu_bo_destroy()
70 	struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);  in amdgpu_bo_user_destroy()  local
73 	ubo = to_amdgpu_bo_user(bo);  in amdgpu_bo_user_destroy()
81 	struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);  in amdgpu_bo_vm_destroy()  local
84 	vmbo = to_amdgpu_bo_vm(bo);  in amdgpu_bo_vm_destroy()
105 bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)  in amdgpu_bo_is_amdgpu_bo()  argument
107 	if (bo->destroy == &amdgpu_bo_destroy ||  in amdgpu_bo_is_amdgpu_bo()
108 	    bo->destroy == &amdgpu_bo_user_destroy ||  in amdgpu_bo_is_amdgpu_bo()
109 	    bo->destroy == &amdgpu_bo_vm_destroy)  in amdgpu_bo_is_amdgpu_bo()
418 void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,  in amdgpu_bo_free_kernel()  argument
421 	if (*bo == NULL)  in amdgpu_bo_free_kernel()
424 	if (likely(amdgpu_bo_reserve(*bo, true) == 0)) {  in amdgpu_bo_free_kernel()
426 			amdgpu_bo_kunmap(*bo);  in amdgpu_bo_free_kernel()
428 		amdgpu_bo_unpin(*bo);  in amdgpu_bo_free_kernel()
429 		amdgpu_bo_unreserve(*bo);  in amdgpu_bo_free_kernel()
431 	amdgpu_bo_unref(bo);  in amdgpu_bo_free_kernel()
535 	struct amdgpu_bo *bo;  in amdgpu_bo_create()  local
560 	bo = kvzalloc(bp->bo_ptr_size, GFP_KERNEL);  in amdgpu_bo_create()
561 	if (bo == NULL)  in amdgpu_bo_create()
563 	drm_gem_private_object_init(adev_to_drm(adev), &bo->tbo.base, size);  in amdgpu_bo_create()
564 	bo->vm_bo = NULL;  in amdgpu_bo_create()
565 	bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain :  in amdgpu_bo_create()
567 	bo->allowed_domains = bo->preferred_domains;  in amdgpu_bo_create()
569 	    bo->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)  in amdgpu_bo_create()
570 		bo->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;  in amdgpu_bo_create()
572 	bo->flags = bp->flags;  in amdgpu_bo_create()
574 	if (!amdgpu_bo_support_uswc(bo->flags))  in amdgpu_bo_create()
575 		bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;  in amdgpu_bo_create()
577 	bo->tbo.bdev = &adev->mman.bdev;  in amdgpu_bo_create()
580 		amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);  in amdgpu_bo_create()
582 		amdgpu_bo_placement_from_domain(bo, bp->domain);  in amdgpu_bo_create()
584 		bo->tbo.priority = 1;  in amdgpu_bo_create()
589 	r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type,  in amdgpu_bo_create()
590 				 &bo->placement, page_align, &ctx,  NULL,  in amdgpu_bo_create()
596 	    bo->tbo.resource->mem_type == TTM_PL_VRAM &&  in amdgpu_bo_create()
597 	    bo->tbo.resource->start < adev->gmc.visible_vram_size >> PAGE_SHIFT)  in amdgpu_bo_create()
604 	    bo->tbo.resource->mem_type == TTM_PL_VRAM) {  in amdgpu_bo_create()
607 		r = amdgpu_fill_buffer(bo, 0, bo->tbo.base.resv, &fence);  in amdgpu_bo_create()
611 		amdgpu_bo_fence(bo, fence, false);  in amdgpu_bo_create()
612 		dma_fence_put(bo->tbo.moving);  in amdgpu_bo_create()
613 		bo->tbo.moving = dma_fence_get(fence);  in amdgpu_bo_create()
617 		amdgpu_bo_unreserve(bo);  in amdgpu_bo_create()
618 	*bo_ptr = bo;  in amdgpu_bo_create()
620 	trace_amdgpu_bo_create(bo);  in amdgpu_bo_create()
624 		bo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;  in amdgpu_bo_create()
630 		dma_resv_unlock(bo->tbo.base.resv);  in amdgpu_bo_create()
631 	amdgpu_bo_unref(&bo);  in amdgpu_bo_create()
709 int amdgpu_bo_validate(struct amdgpu_bo *bo)  in amdgpu_bo_validate()  argument
715 	if (bo->tbo.pin_count)  in amdgpu_bo_validate()
718 	domain = bo->preferred_domains;  in amdgpu_bo_validate()
721 	amdgpu_bo_placement_from_domain(bo, domain);  in amdgpu_bo_validate()
722 	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);  in amdgpu_bo_validate()
723 	if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {  in amdgpu_bo_validate()
724 		domain = bo->allowed_domains;  in amdgpu_bo_validate()
740 	struct amdgpu_device *adev = amdgpu_ttm_adev(vmbo->bo.tbo.bdev);  in amdgpu_bo_add_to_shadow_list()
786 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)  in amdgpu_bo_kmap()  argument
791 	if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)  in amdgpu_bo_kmap()
794 	kptr = amdgpu_bo_kptr(bo);  in amdgpu_bo_kmap()
801 	r = dma_resv_wait_timeout(bo->tbo.base.resv, false, false,  in amdgpu_bo_kmap()
806 	r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.resource->num_pages, &bo->kmap);  in amdgpu_bo_kmap()
811 		*ptr = amdgpu_bo_kptr(bo);  in amdgpu_bo_kmap()
825 void *amdgpu_bo_kptr(struct amdgpu_bo *bo)  in amdgpu_bo_kptr()  argument
829 	return ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);  in amdgpu_bo_kptr()
838 void amdgpu_bo_kunmap(struct amdgpu_bo *bo)  in amdgpu_bo_kunmap()  argument
840 	if (bo->kmap.bo)  in amdgpu_bo_kunmap()
841 		ttm_bo_kunmap(&bo->kmap);  in amdgpu_bo_kunmap()
853 struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo)  in amdgpu_bo_ref()  argument
855 	if (bo == NULL)  in amdgpu_bo_ref()
858 	ttm_bo_get(&bo->tbo);  in amdgpu_bo_ref()
859 	return bo;  in amdgpu_bo_ref()
868 void amdgpu_bo_unref(struct amdgpu_bo **bo)  in amdgpu_bo_unref()  argument
872 	if ((*bo) == NULL)  in amdgpu_bo_unref()
875 	tbo = &((*bo)->tbo);  in amdgpu_bo_unref()
877 	*bo = NULL;  in amdgpu_bo_unref()
902 int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,  in amdgpu_bo_pin_restricted()  argument
905 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);  in amdgpu_bo_pin_restricted()
909 	if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm))  in amdgpu_bo_pin_restricted()
916 	if (bo->tbo.base.import_attach) {  in amdgpu_bo_pin_restricted()
923 	if (bo->tbo.pin_count) {  in amdgpu_bo_pin_restricted()
924 		uint32_t mem_type = bo->tbo.resource->mem_type;  in amdgpu_bo_pin_restricted()
925 		uint32_t mem_flags = bo->tbo.resource->placement;  in amdgpu_bo_pin_restricted()
931 		    (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS) &&  in amdgpu_bo_pin_restricted()
935 		ttm_bo_pin(&bo->tbo);  in amdgpu_bo_pin_restricted()
941 				     (amdgpu_bo_gpu_offset(bo) - domain_start));  in amdgpu_bo_pin_restricted()
952 	if (bo->tbo.base.import_attach)  in amdgpu_bo_pin_restricted()
953 		dma_buf_pin(bo->tbo.base.import_attach);  in amdgpu_bo_pin_restricted()
956 	if (!(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS))  in amdgpu_bo_pin_restricted()
957 		bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;  in amdgpu_bo_pin_restricted()
958 	amdgpu_bo_placement_from_domain(bo, domain);  in amdgpu_bo_pin_restricted()
959 	for (i = 0; i < bo->placement.num_placement; i++) {  in amdgpu_bo_pin_restricted()
965 		if (fpfn > bo->placements[i].fpfn)  in amdgpu_bo_pin_restricted()
966 			bo->placements[i].fpfn = fpfn;  in amdgpu_bo_pin_restricted()
967 		if (!bo->placements[i].lpfn ||  in amdgpu_bo_pin_restricted()
968 		    (lpfn && lpfn < bo->placements[i].lpfn))  in amdgpu_bo_pin_restricted()
969 			bo->placements[i].lpfn = lpfn;  in amdgpu_bo_pin_restricted()
972 	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);  in amdgpu_bo_pin_restricted()
974 		dev_err(adev->dev, "%p pin failed\n", bo);  in amdgpu_bo_pin_restricted()
978 	ttm_bo_pin(&bo->tbo);  in amdgpu_bo_pin_restricted()
980 	domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);  in amdgpu_bo_pin_restricted()
982 		atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);  in amdgpu_bo_pin_restricted()
983 		atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),  in amdgpu_bo_pin_restricted()
986 		atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);  in amdgpu_bo_pin_restricted()
1005 int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain)  in amdgpu_bo_pin()  argument
1007 	bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;  in amdgpu_bo_pin()
1008 	return amdgpu_bo_pin_restricted(bo, domain, 0, 0);  in amdgpu_bo_pin()
1021 void amdgpu_bo_unpin(struct amdgpu_bo *bo)  in amdgpu_bo_unpin()  argument
1023 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);  in amdgpu_bo_unpin()
1025 	ttm_bo_unpin(&bo->tbo);  in amdgpu_bo_unpin()
1026 	if (bo->tbo.pin_count)  in amdgpu_bo_unpin()
1029 	if (bo->tbo.base.import_attach)  in amdgpu_bo_unpin()
1030 		dma_buf_unpin(bo->tbo.base.import_attach);  in amdgpu_bo_unpin()
1032 	if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {  in amdgpu_bo_unpin()
1033 		atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);  in amdgpu_bo_unpin()
1034 		atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),  in amdgpu_bo_unpin()
1036 	} else if (bo->tbo.resource->mem_type == TTM_PL_TT) {  in amdgpu_bo_unpin()
1037 		atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);  in amdgpu_bo_unpin()
1130 int amdgpu_bo_set_tiling_flags(struct amdgpu_bo *bo, u64 tiling_flags)  in amdgpu_bo_set_tiling_flags()  argument
1132 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);  in amdgpu_bo_set_tiling_flags()
1135 	BUG_ON(bo->tbo.type == ttm_bo_type_kernel);  in amdgpu_bo_set_tiling_flags()
1140 	ubo = to_amdgpu_bo_user(bo);  in amdgpu_bo_set_tiling_flags()
1153 void amdgpu_bo_get_tiling_flags(struct amdgpu_bo *bo, u64 *tiling_flags)  in amdgpu_bo_get_tiling_flags()  argument
1157 	BUG_ON(bo->tbo.type == ttm_bo_type_kernel);  in amdgpu_bo_get_tiling_flags()
1158 	dma_resv_assert_held(bo->tbo.base.resv);  in amdgpu_bo_get_tiling_flags()
1159 	ubo = to_amdgpu_bo_user(bo);  in amdgpu_bo_get_tiling_flags()
1178 int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,  in amdgpu_bo_set_metadata()  argument
1184 	BUG_ON(bo->tbo.type == ttm_bo_type_kernel);  in amdgpu_bo_set_metadata()
1185 	ubo = to_amdgpu_bo_user(bo);  in amdgpu_bo_set_metadata()
1225 int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,  in amdgpu_bo_get_metadata()  argument
1234 	BUG_ON(bo->tbo.type == ttm_bo_type_kernel);  in amdgpu_bo_get_metadata()
1235 	ubo = to_amdgpu_bo_user(bo);  in amdgpu_bo_get_metadata()
1263 void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,  in amdgpu_bo_move_notify()  argument
1267 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);  in amdgpu_bo_move_notify()
1269 	struct ttm_resource *old_mem = bo->resource;  in amdgpu_bo_move_notify()
1271 	if (!amdgpu_bo_is_amdgpu_bo(bo))  in amdgpu_bo_move_notify()
1274 	abo = ttm_to_amdgpu_bo(bo);  in amdgpu_bo_move_notify()
1280 	    bo->resource->mem_type != TTM_PL_SYSTEM)  in amdgpu_bo_move_notify()
1295 void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,  in amdgpu_bo_get_memory()  argument
1300 	domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);  in amdgpu_bo_get_memory()
1303 		*vram_mem += amdgpu_bo_size(bo);  in amdgpu_bo_get_memory()
1306 		*gtt_mem += amdgpu_bo_size(bo);  in amdgpu_bo_get_memory()
1310 		*cpu_mem += amdgpu_bo_size(bo);  in amdgpu_bo_get_memory()
1322 void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)  in amdgpu_bo_release_notify()  argument
1328 	if (!amdgpu_bo_is_amdgpu_bo(bo))  in amdgpu_bo_release_notify()
1331 	abo = ttm_to_amdgpu_bo(bo);  in amdgpu_bo_release_notify()
1337 	WARN_ON_ONCE(bo->type == ttm_bo_type_kernel  in amdgpu_bo_release_notify()
1338 			&& bo->base.resv != &bo->base._resv);  in amdgpu_bo_release_notify()
1339 	if (bo->base.resv == &bo->base._resv)  in amdgpu_bo_release_notify()
1342 	if (bo->resource->mem_type != TTM_PL_VRAM ||  in amdgpu_bo_release_notify()
1346 	dma_resv_lock(bo->base.resv, NULL);  in amdgpu_bo_release_notify()
1348 	r = amdgpu_fill_buffer(abo, AMDGPU_POISON, bo->base.resv, &fence);  in amdgpu_bo_release_notify()
1354 	dma_resv_unlock(bo->base.resv);  in amdgpu_bo_release_notify()
1368 vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)  in amdgpu_bo_fault_reserve_notify()  argument
1370 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);  in amdgpu_bo_fault_reserve_notify()
1372 	struct amdgpu_bo *abo = ttm_to_amdgpu_bo(bo);  in amdgpu_bo_fault_reserve_notify()
1379 	if (bo->resource->mem_type != TTM_PL_VRAM)  in amdgpu_bo_fault_reserve_notify()
1382 	offset = bo->resource->start << PAGE_SHIFT;  in amdgpu_bo_fault_reserve_notify()
1383 	if ((offset + bo->base.size) <= adev->gmc.visible_vram_size)  in amdgpu_bo_fault_reserve_notify()
1399 	r = ttm_bo_validate(bo, &abo->placement, &ctx);  in amdgpu_bo_fault_reserve_notify()
1405 	offset = bo->resource->start << PAGE_SHIFT;  in amdgpu_bo_fault_reserve_notify()
1407 	if (bo->resource->mem_type == TTM_PL_VRAM &&  in amdgpu_bo_fault_reserve_notify()
1408 	    (offset + bo->base.size) > adev->gmc.visible_vram_size)  in amdgpu_bo_fault_reserve_notify()
1411 	ttm_bo_move_to_lru_tail_unlocked(bo);  in amdgpu_bo_fault_reserve_notify()
1423 void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,  in amdgpu_bo_fence()  argument
1426 	struct dma_resv *resv = bo->tbo.base.resv;  in amdgpu_bo_fence()
1472 int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)  in amdgpu_bo_sync_wait()  argument
1474 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);  in amdgpu_bo_sync_wait()
1476 	return amdgpu_bo_sync_wait_resv(adev, bo->tbo.base.resv,  in amdgpu_bo_sync_wait()
1490 u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)  in amdgpu_bo_gpu_offset()  argument
1492 	WARN_ON_ONCE(bo->tbo.resource->mem_type == TTM_PL_SYSTEM);  in amdgpu_bo_gpu_offset()
1493 	WARN_ON_ONCE(!dma_resv_is_locked(bo->tbo.base.resv) &&  in amdgpu_bo_gpu_offset()
1494 		     !bo->tbo.pin_count && bo->tbo.type != ttm_bo_type_kernel);  in amdgpu_bo_gpu_offset()
1495 	WARN_ON_ONCE(bo->tbo.resource->start == AMDGPU_BO_INVALID_OFFSET);  in amdgpu_bo_gpu_offset()
1496 	WARN_ON_ONCE(bo->tbo.resource->mem_type == TTM_PL_VRAM &&  in amdgpu_bo_gpu_offset()
1497 		     !(bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS));  in amdgpu_bo_gpu_offset()
1499 	return amdgpu_bo_gpu_offset_no_check(bo);  in amdgpu_bo_gpu_offset()
1509 u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)  in amdgpu_bo_gpu_offset_no_check()  argument
1511 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);  in amdgpu_bo_gpu_offset_no_check()
1514 	offset = (bo->tbo.resource->start << PAGE_SHIFT) +  in amdgpu_bo_gpu_offset_no_check()
1515 		 amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);  in amdgpu_bo_gpu_offset_no_check()
1540 #define amdgpu_bo_print_flag(m, bo, flag)		        \  argument
1542 		if (bo->flags & (AMDGPU_GEM_CREATE_ ## flag)) {	\
1559 u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)  in amdgpu_bo_print_info()  argument
1568 	domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);  in amdgpu_bo_print_info()
1582 	size = amdgpu_bo_size(bo);  in amdgpu_bo_print_info()
1586 	pin_count = READ_ONCE(bo->tbo.pin_count);  in amdgpu_bo_print_info()
1590 	dma_buf = READ_ONCE(bo->tbo.base.dma_buf);  in amdgpu_bo_print_info()
1591 	attachment = READ_ONCE(bo->tbo.base.import_attach);  in amdgpu_bo_print_info()
1598 	amdgpu_bo_print_flag(m, bo, CPU_ACCESS_REQUIRED);  in amdgpu_bo_print_info()
1599 	amdgpu_bo_print_flag(m, bo, NO_CPU_ACCESS);  in amdgpu_bo_print_info()
1600 	amdgpu_bo_print_flag(m, bo, CPU_GTT_USWC);  in amdgpu_bo_print_info()
1601 	amdgpu_bo_print_flag(m, bo, VRAM_CLEARED);  in amdgpu_bo_print_info()
1602 	amdgpu_bo_print_flag(m, bo, VRAM_CONTIGUOUS);  in amdgpu_bo_print_info()
1603 	amdgpu_bo_print_flag(m, bo, VM_ALWAYS_VALID);  in amdgpu_bo_print_info()
1604 	amdgpu_bo_print_flag(m, bo, EXPLICIT_SYNC);  in amdgpu_bo_print_info()