609 amdgpu_lookup_format_info(u32 format, uint64_t modifier)  in amdgpu_lookup_format_info()  argument
611 	if (!IS_AMD_FMT_MOD(modifier))  in amdgpu_lookup_format_info()
614 	if (AMD_FMT_MOD_GET(DCC_RETILE, modifier))  in amdgpu_lookup_format_info()
619 	if (AMD_FMT_MOD_GET(DCC, modifier))  in amdgpu_lookup_format_info()
681 	uint64_t modifier = 0;  in convert_tiling_flags_to_modifier()  local
684 		modifier = DRM_FORMAT_MOD_LINEAR;  in convert_tiling_flags_to_modifier()
758 		modifier = AMD_FMT_MOD |  in convert_tiling_flags_to_modifier()
780 			modifier |= AMD_FMT_MOD_SET(DCC, 1) |  in convert_tiling_flags_to_modifier()
805 				modifier |= AMD_FMT_MOD_SET(DCC_RETILE, 1);  in convert_tiling_flags_to_modifier()
817 					modifier |= AMD_FMT_MOD_SET(RB, rb) |  in convert_tiling_flags_to_modifier()
827 								modifier);  in convert_tiling_flags_to_modifier()
835 	afb->base.modifier = modifier;  in convert_tiling_flags_to_modifier()
874 static unsigned int get_dcc_block_size(uint64_t modifier, bool rb_aligned,  in get_dcc_block_size()  argument
877 	unsigned int ver = AMD_FMT_MOD_GET(TILE_VERSION, modifier);  in get_dcc_block_size()
886 		return max(10 + (rb_aligned ? (int)AMD_FMT_MOD_GET(RB, modifier) : 0), 12);  in get_dcc_block_size()
890 		int pipes_log2 = AMD_FMT_MOD_GET(PIPE_XOR_BITS, modifier);  in get_dcc_block_size()
893 		    AMD_FMT_MOD_GET(PACKERS, modifier) == pipes_log2)  in get_dcc_block_size()
957 	uint64_t modifier = rfb->base.modifier;  in amdgpu_display_verify_sizes()  local
965 		if (modifier == DRM_FORMAT_MOD_LINEAR) {  in amdgpu_display_verify_sizes()
970 			int swizzle = AMD_FMT_MOD_GET(TILE, modifier);  in amdgpu_display_verify_sizes()
1001 	if (AMD_FMT_MOD_GET(DCC, modifier)) {  in amdgpu_display_verify_sizes()
1002 		if (AMD_FMT_MOD_GET(DCC_RETILE, modifier)) {  in amdgpu_display_verify_sizes()
1003 			block_size_log2 = get_dcc_block_size(modifier, false, false);  in amdgpu_display_verify_sizes()
1013 			block_size_log2 = get_dcc_block_size(modifier, true, true);  in amdgpu_display_verify_sizes()
1015 			bool pipe_aligned = AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier);  in amdgpu_display_verify_sizes()
1017 			block_size_log2 = get_dcc_block_size(modifier, true, pipe_aligned);  in amdgpu_display_verify_sizes()
1099 				      mode_cmd->modifier[0])) {  in amdgpu_display_gem_fb_verify_and_init()
1102 			    &mode_cmd->pixel_format, mode_cmd->modifier[0]);  in amdgpu_display_gem_fb_verify_and_init()