660 	uint32_t *config, no_regs = 0;  in amdgpu_debugfs_gca_config_read()  local
670 	config[no_regs++] = 3;  in amdgpu_debugfs_gca_config_read()
671 	config[no_regs++] = adev->gfx.config.max_shader_engines;  in amdgpu_debugfs_gca_config_read()
672 	config[no_regs++] = adev->gfx.config.max_tile_pipes;  in amdgpu_debugfs_gca_config_read()
673 	config[no_regs++] = adev->gfx.config.max_cu_per_sh;  in amdgpu_debugfs_gca_config_read()
674 	config[no_regs++] = adev->gfx.config.max_sh_per_se;  in amdgpu_debugfs_gca_config_read()
675 	config[no_regs++] = adev->gfx.config.max_backends_per_se;  in amdgpu_debugfs_gca_config_read()
676 	config[no_regs++] = adev->gfx.config.max_texture_channel_caches;  in amdgpu_debugfs_gca_config_read()
677 	config[no_regs++] = adev->gfx.config.max_gprs;  in amdgpu_debugfs_gca_config_read()
678 	config[no_regs++] = adev->gfx.config.max_gs_threads;  in amdgpu_debugfs_gca_config_read()
679 	config[no_regs++] = adev->gfx.config.max_hw_contexts;  in amdgpu_debugfs_gca_config_read()
680 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend;  in amdgpu_debugfs_gca_config_read()
681 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend;  in amdgpu_debugfs_gca_config_read()
682 	config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
683 	config[no_regs++] = adev->gfx.config.sc_earlyz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
684 	config[no_regs++] = adev->gfx.config.num_tile_pipes;  in amdgpu_debugfs_gca_config_read()
685 	config[no_regs++] = adev->gfx.config.backend_enable_mask;  in amdgpu_debugfs_gca_config_read()
686 	config[no_regs++] = adev->gfx.config.mem_max_burst_length_bytes;  in amdgpu_debugfs_gca_config_read()
687 	config[no_regs++] = adev->gfx.config.mem_row_size_in_kb;  in amdgpu_debugfs_gca_config_read()
688 	config[no_regs++] = adev->gfx.config.shader_engine_tile_size;  in amdgpu_debugfs_gca_config_read()
689 	config[no_regs++] = adev->gfx.config.num_gpus;  in amdgpu_debugfs_gca_config_read()
690 	config[no_regs++] = adev->gfx.config.multi_gpu_tile_size;  in amdgpu_debugfs_gca_config_read()
691 	config[no_regs++] = adev->gfx.config.mc_arb_ramcfg;  in amdgpu_debugfs_gca_config_read()
692 	config[no_regs++] = adev->gfx.config.gb_addr_config;  in amdgpu_debugfs_gca_config_read()
693 	config[no_regs++] = adev->gfx.config.num_rbs;  in amdgpu_debugfs_gca_config_read()
696 	config[no_regs++] = adev->rev_id;  in amdgpu_debugfs_gca_config_read()
697 	config[no_regs++] = adev->pg_flags;  in amdgpu_debugfs_gca_config_read()
698 	config[no_regs++] = adev->cg_flags;  in amdgpu_debugfs_gca_config_read()
701 	config[no_regs++] = adev->family;  in amdgpu_debugfs_gca_config_read()
702 	config[no_regs++] = adev->external_rev_id;  in amdgpu_debugfs_gca_config_read()
705 	config[no_regs++] = adev->pdev->device;  in amdgpu_debugfs_gca_config_read()
706 	config[no_regs++] = adev->pdev->revision;  in amdgpu_debugfs_gca_config_read()
707 	config[no_regs++] = adev->pdev->subsystem_device;  in amdgpu_debugfs_gca_config_read()
708 	config[no_regs++] = adev->pdev->subsystem_vendor;  in amdgpu_debugfs_gca_config_read()
710 	while (size && (*pos < no_regs * 4)) {  in amdgpu_debugfs_gca_config_read()