199 	struct i2s_platform_data *i2s_pdata = NULL;  in acp_hw_init()  local
252 	i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL);  in acp_hw_init()
253 	if (i2s_pdata == NULL) {  in acp_hw_init()
260 		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |  in acp_hw_init()
264 		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;  in acp_hw_init()
266 	i2s_pdata[0].cap = DWC_I2S_PLAY;  in acp_hw_init()
267 	i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000;  in acp_hw_init()
268 	i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET;  in acp_hw_init()
269 	i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET;  in acp_hw_init()
272 		i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |  in acp_hw_init()
277 		i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |  in acp_hw_init()
281 	i2s_pdata[1].cap = DWC_I2S_RECORD;  in acp_hw_init()
282 	i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000;  in acp_hw_init()
283 	i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;  in acp_hw_init()
284 	i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET;  in acp_hw_init()
286 	i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;  in acp_hw_init()
289 		i2s_pdata[2].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;  in acp_hw_init()
295 	i2s_pdata[2].cap = DWC_I2S_PLAY | DWC_I2S_RECORD;  in acp_hw_init()
296 	i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000;  in acp_hw_init()
297 	i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET;  in acp_hw_init()
298 	i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET;  in acp_hw_init()
334 	adev->acp.acp_cell[1].platform_data = &i2s_pdata[0];  in acp_hw_init()
340 	adev->acp.acp_cell[2].platform_data = &i2s_pdata[1];  in acp_hw_init()
346 	adev->acp.acp_cell[3].platform_data = &i2s_pdata[2];  in acp_hw_init()
403 	kfree(i2s_pdata);  in acp_hw_init()