Lines Matching defs:amdgpu_device
809 struct amdgpu_device { struct
810 struct device *dev;
811 struct pci_dev *pdev;
812 struct drm_device ddev;
815 struct amdgpu_acp acp;
817 struct amdgpu_hive_info *hive;
819 enum amd_asic_type asic_type;
820 uint32_t family;
821 uint32_t rev_id;
822 uint32_t external_rev_id;
823 unsigned long flags;
824 unsigned long apu_flags;
825 int usec_timeout;
826 const struct amdgpu_asic_funcs *asic_funcs;
827 bool shutdown;
828 bool need_swiotlb;
829 bool accel_working;
830 struct notifier_block acpi_nb;
831 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
832 struct debugfs_blob_wrapper debugfs_vbios_blob;
833 struct mutex srbm_mutex;
835 struct mutex grbm_idx_mutex;
836 struct dev_pm_domain vga_pm_domain;
837 bool have_disp_power_ref;
838 bool have_atomics_support;
841 bool is_atom_fw;
842 uint8_t *bios;
843 uint32_t bios_size;
844 uint32_t bios_scratch_reg_offset;
845 uint32_t bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
848 resource_size_t rmmio_base;
849 resource_size_t rmmio_size;
850 void __iomem *rmmio;
852 spinlock_t mmio_idx_lock;
853 struct amdgpu_mmio_remap rmmio_remap;
855 spinlock_t smc_idx_lock;
856 amdgpu_rreg_t smc_rreg;
857 amdgpu_wreg_t smc_wreg;
859 spinlock_t pcie_idx_lock;
860 amdgpu_rreg_t pcie_rreg;
861 amdgpu_wreg_t pcie_wreg;
862 amdgpu_rreg_t pciep_rreg;
863 amdgpu_wreg_t pciep_wreg;
864 amdgpu_rreg64_t pcie_rreg64;
865 amdgpu_wreg64_t pcie_wreg64;
867 spinlock_t uvd_ctx_idx_lock;
868 amdgpu_rreg_t uvd_ctx_rreg;
869 amdgpu_wreg_t uvd_ctx_wreg;
871 spinlock_t didt_idx_lock;
872 amdgpu_rreg_t didt_rreg;
873 amdgpu_wreg_t didt_wreg;
875 spinlock_t gc_cac_idx_lock;
876 amdgpu_rreg_t gc_cac_rreg;
877 amdgpu_wreg_t gc_cac_wreg;
879 spinlock_t se_cac_idx_lock;
880 amdgpu_rreg_t se_cac_rreg;
881 amdgpu_wreg_t se_cac_wreg;
883 spinlock_t audio_endpt_idx_lock;
884 amdgpu_block_rreg_t audio_endpt_rreg;
885 amdgpu_block_wreg_t audio_endpt_wreg;
886 struct amdgpu_doorbell doorbell;
889 struct amdgpu_clock clock;
892 struct amdgpu_gmc gmc;
893 struct amdgpu_gart gart;
894 dma_addr_t dummy_page_addr;
895 struct amdgpu_vm_manager vm_manager;
896 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
897 unsigned num_vmhubs;
922 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */ argument
923 struct work_struct hotplug_work;
924 struct amdgpu_irq_src crtc_irq;
925 struct amdgpu_irq_src vline0_irq;
926 struct amdgpu_irq_src vupdate_irq;
927 struct amdgpu_irq_src pageflip_irq;
928 struct amdgpu_irq_src hpd_irq;
929 struct amdgpu_irq_src dmub_trace_irq;
930 struct amdgpu_irq_src dmub_outbox_irq;
933 u64 fence_context;
934 unsigned num_rings;
935 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
936 bool ib_pool_ready;
937 struct amdgpu_sa_manager ib_pools[AMDGPU_IB_POOL_MAX];
938 struct amdgpu_sched gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
941 struct amdgpu_irq irq;
944 struct amd_powerplay powerplay;
945 bool pp_force_state_enabled;
948 struct smu_context smu;
951 struct amdgpu_pm pm;
952 u32 cg_flags;
953 u32 pg_flags;
956 struct amdgpu_nbio nbio;
959 struct amdgpu_hdp hdp;
962 struct amdgpu_smuio smuio;
965 struct amdgpu_mmhub mmhub;
968 struct amdgpu_gfxhub gfxhub;
971 struct amdgpu_gfx gfx;
974 struct amdgpu_sdma sdma;
977 struct amdgpu_uvd uvd;
980 struct amdgpu_vce vce;
983 struct amdgpu_vcn vcn;
986 struct amdgpu_jpeg jpeg;
989 struct amdgpu_firmware firmware;
992 struct psp_context psp;
995 struct amdgpu_gds gds;
998 struct amdgpu_kfd_dev kfd;
1001 struct amdgpu_umc umc;
1004 struct amdgpu_display_manager dm;
1007 bool enable_mes;
1008 struct amdgpu_mes mes;
1011 struct amdgpu_df df;
1014 struct amdgpu_mca mca;
1016 struct amdgpu_ip_block ip_blocks[AMDGPU_MAX_IP_NUM];
1017 uint32_t harvest_ip_mask;
1018 int num_ip_blocks;
1019 struct mutex mn_lock;
1023 atomic64_t vram_pin_size;
1024 atomic64_t visible_pin_size;
1025 atomic64_t gart_pin_size;
1028 uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
1031 struct delayed_work delayed_init_work;
1033 struct amdgpu_virt virt;
1036 struct list_head shadow_list;
1037 struct mutex shadow_list_lock;
1040 bool has_hw_reset;
1041 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
1044 bool in_suspend;
1045 bool in_s3;
1046 bool in_s4;
1047 bool in_s0ix;
1049 atomic_t in_gpu_reset;
1050 enum pp_mp1_state mp1_state;
1051 struct rw_semaphore reset_sem;
1052 struct amdgpu_doorbell_index doorbell_index;
1054 struct mutex notifier_lock;
1056 int asic_reset_res;
1057 struct work_struct xgmi_reset_work;
1058 struct list_head reset_list;
1060 long gfx_timeout;
1061 long sdma_timeout;
1062 long video_timeout;
1063 long compute_timeout;
1065 uint64_t unique_id;
1066 uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
1069 bool runpm;
1070 bool in_runpm;
1071 bool has_pr3;
1095 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) in drm_to_adev() argument