139 	struct amdgpu_device *tmp_adev = NULL;  in aldebaran_mode2_perform_reset()  local
149 	list_for_each_entry(tmp_adev, &reset_context->hive->device_list,  in aldebaran_mode2_perform_reset()
151 		mutex_lock(&tmp_adev->reset_cntl->reset_lock);  in aldebaran_mode2_perform_reset()
152 		tmp_adev->reset_cntl->active_reset = AMD_RESET_METHOD_MODE2;  in aldebaran_mode2_perform_reset()
158 	list_for_each_entry(tmp_adev, &reset_context->hive->device_list,  in aldebaran_mode2_perform_reset()
161 		if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {  in aldebaran_mode2_perform_reset()
163 					&tmp_adev->reset_cntl->reset_work))  in aldebaran_mode2_perform_reset()
166 			r = aldebaran_mode2_reset(tmp_adev);  in aldebaran_mode2_perform_reset()
168 			dev_err(tmp_adev->dev,  in aldebaran_mode2_perform_reset()
170 				r, adev_to_drm(tmp_adev)->unique);  in aldebaran_mode2_perform_reset()
177 		list_for_each_entry(tmp_adev,  in aldebaran_mode2_perform_reset()
180 			if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {  in aldebaran_mode2_perform_reset()
181 				flush_work(&tmp_adev->reset_cntl->reset_work);  in aldebaran_mode2_perform_reset()
182 				r = tmp_adev->asic_reset_res;  in aldebaran_mode2_perform_reset()
189 	list_for_each_entry(tmp_adev, &reset_context->hive->device_list,  in aldebaran_mode2_perform_reset()
191 		mutex_unlock(&tmp_adev->reset_cntl->reset_lock);  in aldebaran_mode2_perform_reset()
192 		tmp_adev->reset_cntl->active_reset = AMD_RESET_METHOD_NONE;  in aldebaran_mode2_perform_reset()
321 	struct amdgpu_device *tmp_adev = NULL;  in aldebaran_mode2_restore_hwcontext()  local
328 	list_for_each_entry(tmp_adev, &reset_context->hive->device_list,  in aldebaran_mode2_restore_hwcontext()
330 		dev_info(tmp_adev->dev,  in aldebaran_mode2_restore_hwcontext()
332 		r = aldebaran_mode2_restore_ip(tmp_adev);  in aldebaran_mode2_restore_hwcontext()
340 		amdgpu_register_gpu_instance(tmp_adev);  in aldebaran_mode2_restore_hwcontext()
343 		amdgpu_ras_resume(tmp_adev);  in aldebaran_mode2_restore_hwcontext()
347 		    tmp_adev->gmc.xgmi.num_physical_nodes > 1)  in aldebaran_mode2_restore_hwcontext()
349 							tmp_adev);  in aldebaran_mode2_restore_hwcontext()
352 			amdgpu_irq_gpu_reset_resume_helper(tmp_adev);  in aldebaran_mode2_restore_hwcontext()
354 			r = amdgpu_ib_ring_tests(tmp_adev);  in aldebaran_mode2_restore_hwcontext()
356 				dev_err(tmp_adev->dev,  in aldebaran_mode2_restore_hwcontext()
359 				tmp_adev->asic_reset_res = r;  in aldebaran_mode2_restore_hwcontext()