71 static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)  in gpio_rcar_read()  argument
73 	return ioread32(p->base + offs);  in gpio_rcar_read()
76 static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,  in gpio_rcar_write()  argument
79 	iowrite32(value, p->base + offs);  in gpio_rcar_write()
82 static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,  in gpio_rcar_modify_bit()  argument
85 	u32 tmp = gpio_rcar_read(p, offs);  in gpio_rcar_modify_bit()
92 	gpio_rcar_write(p, offs, tmp);  in gpio_rcar_modify_bit()
98 	struct gpio_rcar_priv *p = gpiochip_get_data(gc);  in gpio_rcar_irq_disable()  local
100 	gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));  in gpio_rcar_irq_disable()
106 	struct gpio_rcar_priv *p = gpiochip_get_data(gc);  in gpio_rcar_irq_enable()  local
108 	gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));  in gpio_rcar_irq_enable()
111 static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,  in gpio_rcar_config_interrupt_input_mode()  argument
124 	spin_lock_irqsave(&p->lock, flags);  in gpio_rcar_config_interrupt_input_mode()
127 	gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);  in gpio_rcar_config_interrupt_input_mode()
130 	gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);  in gpio_rcar_config_interrupt_input_mode()
133 	if (p->info.has_both_edge_trigger)  in gpio_rcar_config_interrupt_input_mode()
134 		gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);  in gpio_rcar_config_interrupt_input_mode()
137 	gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);  in gpio_rcar_config_interrupt_input_mode()
141 		gpio_rcar_write(p, INTCLR, BIT(hwirq));  in gpio_rcar_config_interrupt_input_mode()
143 	spin_unlock_irqrestore(&p->lock, flags);  in gpio_rcar_config_interrupt_input_mode()
149 	struct gpio_rcar_priv *p = gpiochip_get_data(gc);  in gpio_rcar_irq_set_type()  local
152 	dev_dbg(p->dev, "sense irq = %d, type = %d\n", hwirq, type);  in gpio_rcar_irq_set_type()
156 		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,  in gpio_rcar_irq_set_type()
160 		gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,  in gpio_rcar_irq_set_type()
164 		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,  in gpio_rcar_irq_set_type()
168 		gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,  in gpio_rcar_irq_set_type()
172 		if (!p->info.has_both_edge_trigger)  in gpio_rcar_irq_set_type()
174 		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,  in gpio_rcar_irq_set_type()
186 	struct gpio_rcar_priv *p = gpiochip_get_data(gc);  in gpio_rcar_irq_set_wake()  local
189 	if (p->irq_parent) {  in gpio_rcar_irq_set_wake()
190 		error = irq_set_irq_wake(p->irq_parent, on);  in gpio_rcar_irq_set_wake()
192 			dev_dbg(p->dev, "irq %u doesn't support irq_set_wake\n",  in gpio_rcar_irq_set_wake()
193 				p->irq_parent);  in gpio_rcar_irq_set_wake()
194 			p->irq_parent = 0;  in gpio_rcar_irq_set_wake()
199 		atomic_inc(&p->wakeup_path);  in gpio_rcar_irq_set_wake()
201 		atomic_dec(&p->wakeup_path);  in gpio_rcar_irq_set_wake()
208 	struct gpio_rcar_priv *p = dev_id;  in gpio_rcar_irq_handler()  local
212 	while ((pending = gpio_rcar_read(p, INTDT) &  in gpio_rcar_irq_handler()
213 			  gpio_rcar_read(p, INTMSK))) {  in gpio_rcar_irq_handler()
215 		gpio_rcar_write(p, INTCLR, BIT(offset));  in gpio_rcar_irq_handler()
216 		generic_handle_domain_irq(p->gpio_chip.irq.domain,  in gpio_rcar_irq_handler()
228 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_config_general_input_output_mode()  local
236 	spin_lock_irqsave(&p->lock, flags);  in gpio_rcar_config_general_input_output_mode()
239 	gpio_rcar_modify_bit(p, POSNEG, gpio, false);  in gpio_rcar_config_general_input_output_mode()
242 	gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);  in gpio_rcar_config_general_input_output_mode()
245 	gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);  in gpio_rcar_config_general_input_output_mode()
248 	if (p->info.has_outdtsel && output)  in gpio_rcar_config_general_input_output_mode()
249 		gpio_rcar_modify_bit(p, OUTDTSEL, gpio, false);  in gpio_rcar_config_general_input_output_mode()
251 	spin_unlock_irqrestore(&p->lock, flags);  in gpio_rcar_config_general_input_output_mode()
256 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_request()  local
259 	error = pm_runtime_get_sync(p->dev);  in gpio_rcar_request()
261 		pm_runtime_put(p->dev);  in gpio_rcar_request()
267 		pm_runtime_put(p->dev);  in gpio_rcar_request()
274 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_free()  local
284 	pm_runtime_put(p->dev);  in gpio_rcar_free()
289 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_get_direction()  local
291 	if (gpio_rcar_read(p, INOUTSEL) & BIT(offset))  in gpio_rcar_get_direction()
305 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_get()  local
312 	if (!p->info.has_always_in && (gpio_rcar_read(p, INOUTSEL) & bit))  in gpio_rcar_get()
313 		return !!(gpio_rcar_read(p, OUTDT) & bit);  in gpio_rcar_get()
315 		return !!(gpio_rcar_read(p, INDT) & bit);  in gpio_rcar_get()
321 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_get_multiple()  local
332 	if (p->info.has_always_in) {  in gpio_rcar_get_multiple()
333 		bits[0] = gpio_rcar_read(p, INDT) & bankmask;  in gpio_rcar_get_multiple()
337 	spin_lock_irqsave(&p->lock, flags);  in gpio_rcar_get_multiple()
338 	outputs = gpio_rcar_read(p, INOUTSEL);  in gpio_rcar_get_multiple()
341 		val |= gpio_rcar_read(p, OUTDT) & m;  in gpio_rcar_get_multiple()
345 		val |= gpio_rcar_read(p, INDT) & m;  in gpio_rcar_get_multiple()
346 	spin_unlock_irqrestore(&p->lock, flags);  in gpio_rcar_get_multiple()
354 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_set()  local
357 	spin_lock_irqsave(&p->lock, flags);  in gpio_rcar_set()
358 	gpio_rcar_modify_bit(p, OUTDT, offset, value);  in gpio_rcar_set()
359 	spin_unlock_irqrestore(&p->lock, flags);  in gpio_rcar_set()
365 	struct gpio_rcar_priv *p = gpiochip_get_data(chip);  in gpio_rcar_set_multiple()  local
376 	spin_lock_irqsave(&p->lock, flags);  in gpio_rcar_set_multiple()
377 	val = gpio_rcar_read(p, OUTDT);  in gpio_rcar_set_multiple()
380 	gpio_rcar_write(p, OUTDT, val);  in gpio_rcar_set_multiple()
381 	spin_unlock_irqrestore(&p->lock, flags);  in gpio_rcar_set_multiple()
444 static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins)  in gpio_rcar_parse_dt()  argument
446 	struct device_node *np = p->dev->of_node;  in gpio_rcar_parse_dt()
451 	info = of_device_get_match_data(p->dev);  in gpio_rcar_parse_dt()
452 	p->info = *info;  in gpio_rcar_parse_dt()
458 		dev_warn(p->dev, "Invalid number of gpio lines %u, using %u\n",  in gpio_rcar_parse_dt()
466 static void gpio_rcar_enable_inputs(struct gpio_rcar_priv *p)  in gpio_rcar_enable_inputs()  argument
468 	u32 mask = GENMASK(p->gpio_chip.ngpio - 1, 0);  in gpio_rcar_enable_inputs()
471 	if (p->gpio_chip.valid_mask)  in gpio_rcar_enable_inputs()
472 		mask &= p->gpio_chip.valid_mask[0];  in gpio_rcar_enable_inputs()
474 		gpio_rcar_write(p, INEN, gpio_rcar_read(p, INEN) | mask);  in gpio_rcar_enable_inputs()
479 	struct gpio_rcar_priv *p;  in gpio_rcar_probe()  local
489 	p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);  in gpio_rcar_probe()
490 	if (!p)  in gpio_rcar_probe()
493 	p->dev = dev;  in gpio_rcar_probe()
494 	spin_lock_init(&p->lock);  in gpio_rcar_probe()
497 	ret = gpio_rcar_parse_dt(p, &npins);  in gpio_rcar_probe()
501 	platform_set_drvdata(pdev, p);  in gpio_rcar_probe()
512 	p->base = devm_platform_ioremap_resource(pdev, 0);  in gpio_rcar_probe()
513 	if (IS_ERR(p->base)) {  in gpio_rcar_probe()
514 		ret = PTR_ERR(p->base);  in gpio_rcar_probe()
518 	gpio_chip = &p->gpio_chip;  in gpio_rcar_probe()
534 	irq_chip = &p->irq_chip;  in gpio_rcar_probe()
552 	ret = gpiochip_add_data(gpio_chip, p);  in gpio_rcar_probe()
558 	p->irq_parent = irq->start;  in gpio_rcar_probe()
560 			     IRQF_SHARED, name, p)) {  in gpio_rcar_probe()
566 	if (p->info.has_inen) {  in gpio_rcar_probe()
568 		gpio_rcar_enable_inputs(p);  in gpio_rcar_probe()
585 	struct gpio_rcar_priv *p = platform_get_drvdata(pdev);  in gpio_rcar_remove()  local
587 	gpiochip_remove(&p->gpio_chip);  in gpio_rcar_remove()
596 	struct gpio_rcar_priv *p = dev_get_drvdata(dev);  in gpio_rcar_suspend()  local
598 	p->bank_info.iointsel = gpio_rcar_read(p, IOINTSEL);  in gpio_rcar_suspend()
599 	p->bank_info.inoutsel = gpio_rcar_read(p, INOUTSEL);  in gpio_rcar_suspend()
600 	p->bank_info.outdt = gpio_rcar_read(p, OUTDT);  in gpio_rcar_suspend()
601 	p->bank_info.intmsk = gpio_rcar_read(p, INTMSK);  in gpio_rcar_suspend()
602 	p->bank_info.posneg = gpio_rcar_read(p, POSNEG);  in gpio_rcar_suspend()
603 	p->bank_info.edglevel = gpio_rcar_read(p, EDGLEVEL);  in gpio_rcar_suspend()
604 	if (p->info.has_both_edge_trigger)  in gpio_rcar_suspend()
605 		p->bank_info.bothedge = gpio_rcar_read(p, BOTHEDGE);  in gpio_rcar_suspend()
607 	if (atomic_read(&p->wakeup_path))  in gpio_rcar_suspend()
615 	struct gpio_rcar_priv *p = dev_get_drvdata(dev);  in gpio_rcar_resume()  local
619 	for (offset = 0; offset < p->gpio_chip.ngpio; offset++) {  in gpio_rcar_resume()
620 		if (!gpiochip_line_is_valid(&p->gpio_chip, offset))  in gpio_rcar_resume()
625 		if (!(p->bank_info.iointsel & mask)) {  in gpio_rcar_resume()
626 			if (p->bank_info.inoutsel & mask)  in gpio_rcar_resume()
628 					&p->gpio_chip, offset,  in gpio_rcar_resume()
629 					!!(p->bank_info.outdt & mask));  in gpio_rcar_resume()
631 				gpio_rcar_direction_input(&p->gpio_chip,  in gpio_rcar_resume()
636 				p,  in gpio_rcar_resume()
638 				!(p->bank_info.posneg & mask),  in gpio_rcar_resume()
639 				!(p->bank_info.edglevel & mask),  in gpio_rcar_resume()
640 				!!(p->bank_info.bothedge & mask));  in gpio_rcar_resume()
642 			if (p->bank_info.intmsk & mask)  in gpio_rcar_resume()
643 				gpio_rcar_write(p, MSKCLR, mask);  in gpio_rcar_resume()
647 	if (p->info.has_inen)  in gpio_rcar_resume()
648 		gpio_rcar_enable_inputs(p);  in gpio_rcar_resume()