Lines Matching refs:dclr0
1023 if (pvt->dclr0 & BIT(bit)) in determine_edac_cap()
1166 debug_dump_dramcfg_low(pvt, pvt->dclr0, 0); in __dump_misc_regs()
1347 pvt->dram_type = (pvt->dclr0 & BIT(18)) ? MEM_DDR : MEM_RDDR; in determine_memory_type()
1354 pvt->dram_type = (pvt->dclr0 & BIT(16)) ? MEM_DDR2 : MEM_RDDR2; in determine_memory_type()
1375 else if (pvt->dclr0 & BIT(16)) in determine_memory_type()
1394 pvt->dram_type = (pvt->dclr0 & BIT(16)) ? MEM_DDR3 : MEM_RDDR3; in determine_memory_type()
1404 flag = pvt->dclr0 & WIDTH_128; in k8_early_channel_count()
1407 flag = pvt->dclr0 & REVE_WIDTH_128; in k8_early_channel_count()
1622 u32 dclr = dct ? pvt->dclr1 : pvt->dclr0; in k8_dbam_to_chip_select()
1679 if (pvt->fam == 0x10 && (pvt->dclr0 & WIDTH_128)) in f1x_early_channel_count()
1789 u32 dclr = dct ? pvt->dclr1 : pvt->dclr0; in f10_dbam_to_chip_select()
3128 amd64_read_dct_pci_cfg(pvt, 0, DCLR0, &pvt->dclr0); in read_mc_regs()