1074 	int cs_mode = 0;  in f17_get_cs_mode()  local
1077 		cs_mode |= CS_EVEN_PRIMARY;  in f17_get_cs_mode()
1080 		cs_mode |= CS_ODD_PRIMARY;  in f17_get_cs_mode()
1084 		cs_mode |= CS_ODD_SECONDARY;  in f17_get_cs_mode()
1086 	return cs_mode;  in f17_get_cs_mode()
1091 	int dimm, size0, size1, cs0, cs1, cs_mode;  in debug_display_dimm_sizes_df()  local
1099 		cs_mode = f17_get_cs_mode(dimm, ctrl, pvt);  in debug_display_dimm_sizes_df()
1101 		size0 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs0);  in debug_display_dimm_sizes_df()
1102 		size1 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs1);  in debug_display_dimm_sizes_df()
1620 				  unsigned cs_mode, int cs_mask_nr)  in k8_dbam_to_chip_select()  argument
1625 		WARN_ON(cs_mode > 11);  in k8_dbam_to_chip_select()
1626 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in k8_dbam_to_chip_select()
1630 		WARN_ON(cs_mode > 10);  in k8_dbam_to_chip_select()
1656 		diff = cs_mode/3 + (unsigned)(cs_mode > 5);  in k8_dbam_to_chip_select()
1658 		return 32 << (cs_mode - diff);  in k8_dbam_to_chip_select()
1661 		WARN_ON(cs_mode > 6);  in k8_dbam_to_chip_select()
1662 		return 32 << cs_mode;  in k8_dbam_to_chip_select()
1787 				   unsigned cs_mode, int cs_mask_nr)  in f10_dbam_to_chip_select()  argument
1791 	WARN_ON(cs_mode > 11);  in f10_dbam_to_chip_select()
1794 		return ddr3_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1796 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1803 				   unsigned cs_mode, int cs_mask_nr)  in f15_dbam_to_chip_select()  argument
1805 	WARN_ON(cs_mode > 12);  in f15_dbam_to_chip_select()
1807 	return ddr3_cs_size(cs_mode, false);  in f15_dbam_to_chip_select()
1812 					unsigned cs_mode, int cs_mask_nr)  in f15_m60h_dbam_to_chip_select()  argument
1817 	WARN_ON(cs_mode > 12);  in f15_m60h_dbam_to_chip_select()
1820 		if (cs_mode > 9)  in f15_m60h_dbam_to_chip_select()
1823 		cs_size = ddr4_cs_size(cs_mode);  in f15_m60h_dbam_to_chip_select()
1829 		cs_size = ddr3_lrdimm_cs_size(cs_mode, rank_multiply);  in f15_m60h_dbam_to_chip_select()
1832 		if (cs_mode == 0x1)  in f15_m60h_dbam_to_chip_select()
1835 		cs_size = ddr3_cs_size(cs_mode, false);  in f15_m60h_dbam_to_chip_select()
1845 				unsigned cs_mode, int cs_mask_nr)  in f16_dbam_to_chip_select()  argument
1847 	WARN_ON(cs_mode > 12);  in f16_dbam_to_chip_select()
1849 	if (cs_mode == 6 || cs_mode == 8 ||  in f16_dbam_to_chip_select()
1850 	    cs_mode == 9 || cs_mode == 12)  in f16_dbam_to_chip_select()
1853 		return ddr3_cs_size(cs_mode, false);  in f16_dbam_to_chip_select()
1857 				    unsigned int cs_mode, int csrow_nr)  in f17_addr_mask_to_cs_size()  argument
1864 	if (!cs_mode)  in f17_addr_mask_to_cs_size()
1868 	if (!(cs_mode & CS_EVEN) && !(csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1872 	if (!(cs_mode & CS_ODD) && (csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1883 	if ((csrow_nr & 1) && (cs_mode & CS_ODD_SECONDARY))  in f17_addr_mask_to_cs_size()
3183 	u32 cs_mode, nr_pages;  in get_csrow_nr_pages()  local
3187 		cs_mode = DBAM_DIMM(csrow_nr, dbam);  in get_csrow_nr_pages()
3189 		cs_mode = f17_get_cs_mode(csrow_nr >> 1, dct, pvt);  in get_csrow_nr_pages()
3192 	nr_pages   = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr);  in get_csrow_nr_pages()
3196 		    csrow_nr_orig, dct,  cs_mode);  in get_csrow_nr_pages()