11 #include <linux/edac.h>
76 /*********************** EDAC Memory Controller Functions ****************/
78 /* The SDRAM controller uses the EDAC Memory Controller framework.       */
225 	{ .compatible = "altr,sdram-edac", .data = &c5_data},
226 	{ .compatible = "altr,sdram-edac-a10", .data = &a10_data},
457 		    "EDAC Probe Failed; Error %d\n", res);  in altr_sdram_probe()
474  * If you want to suspend, need to disable EDAC by removing it
480 	pr_err("Suspend not allowed when EDAC is enabled.\n");  in altr_sdram_prepare()
506 /************************* EDAC Parent Probe *************************/
532 /************************* EDAC Device Functions *************************/
535  * EDAC Device Functions (shared between various IPs).
536  * The discrete memories use the EDAC Device framework. The probe
538  * so they are shared. The memory allocation and freeing for EDAC
708  *	This is a generic EDAC device driver that will support
752 			    "%s: Unable to allocate EDAC device\n", ecc_name);  in altr_edac_device_probe()
768 	/* Get driver specific data for this EDAC device */  in altr_edac_device_probe()
810 		    "%s:Error setting up EDAC device: %d\n", ecc_name, res);  in altr_edac_device_probe()
1082 /*********************** SDRAM EDAC Device Functions *********************/
1100 /*********************** OCRAM EDAC Device Functions *********************/
1198 /********************* L2 Cache EDAC Device Functions ********************/
1258 		regmap_write(dci->edac->ecc_mgr_map,  in altr_edac_a10_l2_irq()
1265 		regmap_write(dci->edac->ecc_mgr_map,  in altr_edac_a10_l2_irq()
1485 	/* Create the PortB EDAC device */  in altr_portb_setup()
1491 			    "%s: Unable to allocate PortB EDAC device\n",  in altr_portb_setup()
1496 	/* Initialize the PortB EDAC device structure from PortA structure */  in altr_portb_setup()
1572 	list_add(&altdev->next, &altdev->edac->a10_ecc_devices);  in altr_portb_setup()
1582 		    "%s:Error setting up EDAC device: %d\n", ecc_name, rc);  in altr_portb_setup()
1666 /********************* Arria10 EDAC Device Functions *************************/
1695 	{ .compatible = "altr,sdram-edac-s10", .data = &s10_sdramecc_data },
1702  * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1736  * The Stratix10 EDAC Error Injection Functions differ from Arria10
1801 	struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);  in altr_edac_a10_irq_handler()  local
1806 	dberr = (irq == edac->db_irq) ? 1 : 0;  in altr_edac_a10_irq_handler()
1812 	regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);  in altr_edac_a10_irq_handler()
1816 		generic_handle_domain_irq(edac->domain, dberr * 32 + bit);  in altr_edac_a10_irq_handler()
1827 	if (of_device_is_compatible(np, "altr,sdram-edac-s10"))  in validate_parent_available()
1855 static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,  in altr_edac_a10_device_add()  argument
1871 	/* Get driver specific data for this EDAC device */  in altr_edac_a10_device_add()
1879 	if (!devres_open_group(edac->dev, altr_edac_a10_device_add, GFP_KERNEL))  in altr_edac_a10_device_add()
1882 	if (of_device_is_compatible(np, "altr,sdram-edac-s10"))  in altr_edac_a10_device_add()
1900 			    "%s: Unable to allocate EDAC device\n", ecc_name);  in altr_edac_a10_device_add()
1906 	dci->dev = edac->dev;  in altr_edac_a10_device_add()
1909 	altdev->edac = edac;  in altr_edac_a10_device_add()
1912 	altdev->ddev = *edac->dev;  in altr_edac_a10_device_add()
1918 	altdev->base = devm_ioremap_resource(edac->dev, &res);  in altr_edac_a10_device_add()
1937 	rc = devm_request_irq(edac->dev, altdev->sb_irq, prv->ecc_irq_handler,  in altr_edac_a10_device_add()
1960 	rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler,  in altr_edac_a10_device_add()
1971 		dev_err(edac->dev, "edac_device_add_device failed\n");  in altr_edac_a10_device_add()
1978 	list_add(&altdev->next, &edac->a10_ecc_devices);  in altr_edac_a10_device_add()
1980 	devres_remove_group(edac->dev, altr_edac_a10_device_add);  in altr_edac_a10_device_add()
1987 	devres_release_group(edac->dev, NULL);  in altr_edac_a10_device_add()
1989 		    "%s:Error setting up EDAC device: %d\n", ecc_name, rc);  in altr_edac_a10_device_add()
1996 	struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d);  in a10_eccmgr_irq_mask()  local
1998 	regmap_write(edac->ecc_mgr_map,	A10_SYSMGR_ECC_INTMASK_SET_OFST,  in a10_eccmgr_irq_mask()
2004 	struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d);  in a10_eccmgr_irq_unmask()  local
2006 	regmap_write(edac->ecc_mgr_map,	A10_SYSMGR_ECC_INTMASK_CLR_OFST,  in a10_eccmgr_irq_unmask()
2013 	struct altr_arria10_edac *edac = d->host_data;  in a10_eccmgr_irqdomain_map()  local
2015 	irq_set_chip_and_handler(irq, &edac->irq_chip, handle_simple_irq);  in a10_eccmgr_irqdomain_map()
2016 	irq_set_chip_data(irq, edac);  in a10_eccmgr_irqdomain_map()
2027 /************** Stratix 10 EDAC Double Bit Error Handler ************/
2041 	struct altr_arria10_edac *edac = to_a10edac(this, panic_notifier);  in s10_edac_dberr_handler()  local
2044 	regmap_read(edac->ecc_mgr_map, S10_SYSMGR_ECC_INTSTAT_DERR_OFST,  in s10_edac_dberr_handler()
2046 	regmap_write(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, dberror);  in s10_edac_dberr_handler()
2053 		list_for_each(position, &edac->a10_ecc_devices) {  in s10_edac_dberr_handler()
2062 			regmap_write(edac->ecc_mgr_map,  in s10_edac_dberr_handler()
2065 				    "EDAC: [Fatal DBE on %s @ 0x%08X]\n",  in s10_edac_dberr_handler()
2079 /****************** Arria 10 EDAC Probe Function *********************/
2082 	struct altr_arria10_edac *edac;  in altr_edac_a10_probe()  local
2085 	edac = devm_kzalloc(&pdev->dev, sizeof(*edac), GFP_KERNEL);  in altr_edac_a10_probe()
2086 	if (!edac)  in altr_edac_a10_probe()
2089 	edac->dev = &pdev->dev;  in altr_edac_a10_probe()
2090 	platform_set_drvdata(pdev, edac);  in altr_edac_a10_probe()
2091 	INIT_LIST_HEAD(&edac->a10_ecc_devices);  in altr_edac_a10_probe()
2093 	edac->ecc_mgr_map =  in altr_edac_a10_probe()
2097 	if (IS_ERR(edac->ecc_mgr_map)) {  in altr_edac_a10_probe()
2100 		return PTR_ERR(edac->ecc_mgr_map);  in altr_edac_a10_probe()
2103 	edac->irq_chip.name = pdev->dev.of_node->name;  in altr_edac_a10_probe()
2104 	edac->irq_chip.irq_mask = a10_eccmgr_irq_mask;  in altr_edac_a10_probe()
2105 	edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask;  in altr_edac_a10_probe()
2106 	edac->domain = irq_domain_add_linear(pdev->dev.of_node, 64,  in altr_edac_a10_probe()
2107 					     &a10_eccmgr_ic_ops, edac);  in altr_edac_a10_probe()
2108 	if (!edac->domain) {  in altr_edac_a10_probe()
2113 	edac->sb_irq = platform_get_irq(pdev, 0);  in altr_edac_a10_probe()
2114 	if (edac->sb_irq < 0) {  in altr_edac_a10_probe()
2116 		return edac->sb_irq;  in altr_edac_a10_probe()
2119 	irq_set_chained_handler_and_data(edac->sb_irq,  in altr_edac_a10_probe()
2121 					 edac);  in altr_edac_a10_probe()
2127 		edac->panic_notifier.notifier_call = s10_edac_dberr_handler;  in altr_edac_a10_probe()
2129 					       &edac->panic_notifier);  in altr_edac_a10_probe()
2132 		regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,  in altr_edac_a10_probe()
2135 			regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,  in altr_edac_a10_probe()
2141 			regmap_write(edac->ecc_mgr_map,  in altr_edac_a10_probe()
2143 			regmap_write(edac->ecc_mgr_map,  in altr_edac_a10_probe()
2148 	edac->db_irq = platform_get_irq(pdev, 1);  in altr_edac_a10_probe()
2149 	if (edac->db_irq < 0) {  in altr_edac_a10_probe()
2151 		return edac->db_irq;  in altr_edac_a10_probe()
2153 	irq_set_chained_handler_and_data(edac->db_irq,  in altr_edac_a10_probe()
2154 					 altr_edac_a10_irq_handler, edac);  in altr_edac_a10_probe()
2162 			altr_edac_a10_device_add(edac, child);  in altr_edac_a10_probe()
2165 		else if (of_device_is_compatible(child, "altr,sdram-edac-a10"))  in altr_edac_a10_probe()
2193 MODULE_DESCRIPTION("EDAC Driver for Altera Memories");