Lines Matching full:for

22 	  The mailing list for the EDAC project is linux-edac@vger.kernel.org.
38 This turns on debugging information for the entire EDAC subsystem.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
81 Support for error detection and correction of DRAM ECC errors on
87 AMD CPUs up to and excluding family 0x17 provide for Memory
106 Support for error detection and correction for Amazon's Annapurna
113 Support for error detection and correction on the AMD 76x
120 Support for error detection and correction on the Intel
127 Support for error detection and correction on the Intel
135 Support for error detection and correction on the Intel
142 Support for error detection and correction on the Intel
149 Support for error detection and correction on the Intel
156 Support for error detection and correction on the Intel
163 Support for error detection and correction on the Intel
170 Support for error detection and correction on the Intel
177 Support for error detection and correction on the Intel
184 Support for error detection and correction the Intel
191 Support for error detection and correction the Intel
200 Support for error detection and correction on the Intel
207 Support for error detection and correction on the Radisys
214 Support for error detection and correction the Intel
221 Support for error detection and correction the Intel
228 Support for error detection and correction the Intel
235 Support for error detection and correction the Intel
245 Support for error detection and correction the Intel
257 Support for error detection and correction the Intel
266 Support for error detection and correction on the Intel
276 Support for error detection and correction on the Intel
285 Support for error detection and correction on the Freescale
292 Support for error detection and correction on Freescale memory
299 Support for error detection and correction on PA Semi
306 Support for error detection and correction on the
314 This enables support for EDAC on the ECC memory used
323 Support for error detection and correction on the
332 Support for error detection and correction on the
341 Support for error detection and correction on the
350 Support for error detection and correction on the
357 Support for error detection and correction on the
364 Support for error detection and correction on the primary caches of
371 Support for error detection and correction on the
378 Support for error detection and correction on the
385 Support for error detection and correction on the
393 Support for error detection and correction on the
402 Support for error detection and correction on the
403 Altera SOCs. This is the global enable for the
410 Support for error detection and correction on the
411 Altera SDRAM Memory for Altera SoCs. Note that the
419 Support for error detection and correction on the
420 Altera L2 cache Memory for Altera SoCs. This option
427 Support for error detection and correction on the
428 Altera On-Chip RAM Memory for Altera SoCs.
434 Support for error detection and correction on the
435 Altera Ethernet FIFO Memory for Altera SoCs.
441 Support for error detection and correction on the
442 Altera NAND FIFO Memory for Altera SoCs.
448 Support for error detection and correction on the
449 Altera DMA FIFO Memory for Altera SoCs.
455 Support for error detection and correction on the
456 Altera USB FIFO Memory for Altera SoCs.
462 Support for error detection and correction on the
463 Altera QSPI FIFO Memory for Altera SoCs.
469 Support for error detection and correction on the
470 Altera SDMMC FIFO Memory for Altera SoCs.
476 Support for error detection and correction on the SiFive SoCs.
482 Support for error correction and detection on the Marvell Aramada XP
489 Support for error detection and correction on the Synopsys DDR
496 Support for error detection and correction on the
503 Support for error detection and correction on the TI SoCs.
509 Support for error detection and correction on the
513 As of now, it supports error reporting for Last Level Cache Controller (LLCC)
516 For debugging issues having to do with stability and overall system
523 Support for error detection and correction on the Aspeed AST BMC SoC.
532 Support for error detection and correction on the
539 Support for error detection and correction on the