Lines Matching refs:stm32_dma_write
247 static void stm32_dma_write(struct stm32_dma_device *dmadev, u32 reg, u32 val) in stm32_dma_write() function
435 stm32_dma_write(dmadev, STM32_DMA_HIFCR, dma_ifcr); in stm32_dma_irq_clear()
437 stm32_dma_write(dmadev, STM32_DMA_LIFCR, dma_ifcr); in stm32_dma_irq_clear()
451 stm32_dma_write(dmadev, reg, dma_scr); in stm32_dma_disable_chan()
470 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), dma_scr); in stm32_dma_stop()
473 stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), dma_sfcr); in stm32_dma_stop()
571 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
572 stm32_dma_write(dmadev, STM32_DMA_SPAR(chan->id), reg->dma_spar); in stm32_dma_start_transfer()
573 stm32_dma_write(dmadev, STM32_DMA_SM0AR(chan->id), reg->dma_sm0ar); in stm32_dma_start_transfer()
574 stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), reg->dma_sfcr); in stm32_dma_start_transfer()
575 stm32_dma_write(dmadev, STM32_DMA_SM1AR(chan->id), reg->dma_sm1ar); in stm32_dma_start_transfer()
576 stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), reg->dma_sndtr); in stm32_dma_start_transfer()
592 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
616 stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), dma_sm0ar); in stm32_dma_configure_next_sg()
621 stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), dma_sm1ar); in stm32_dma_configure_next_sg()