172 static void rz_dmac_writel(struct rz_dmac *dmac, unsigned int val,  in rz_dmac_writel()  argument
175 	writel(val, dmac->base + offset);  in rz_dmac_writel()
178 static void rz_dmac_ext_writel(struct rz_dmac *dmac, unsigned int val,  in rz_dmac_ext_writel()  argument
181 	writel(val, dmac->ext_base + offset);  in rz_dmac_ext_writel()
184 static u32 rz_dmac_ext_readl(struct rz_dmac *dmac, unsigned int offset)  in rz_dmac_ext_readl()  argument
186 	return readl(dmac->ext_base + offset);  in rz_dmac_ext_readl()
253 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_enable_hw()  local
259 	dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index);  in rz_dmac_enable_hw()
284 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_disable_hw()  local
287 	dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index);  in rz_dmac_disable_hw()
294 static void rz_dmac_set_dmars_register(struct rz_dmac *dmac, int nr, u32 dmars)  in rz_dmac_set_dmars_register()  argument
300 	dmars32 = rz_dmac_ext_readl(dmac, dmars_offset);  in rz_dmac_set_dmars_register()
304 	rz_dmac_ext_writel(dmac, dmars32, dmars_offset);  in rz_dmac_set_dmars_register()
310 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_prepare_desc_for_memcpy()  local
324 	rz_dmac_set_dmars_register(dmac, channel->index, 0);  in rz_dmac_prepare_desc_for_memcpy()
333 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_prepare_descs_for_slave_sg()  local
375 	rz_dmac_set_dmars_register(dmac, channel->index, channel->mid_rid);  in rz_dmac_prepare_descs_for_slave_sg()
437 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_free_chan_resources()  local
453 		clear_bit(channel->mid_rid, dmac->modules);  in rz_dmac_free_chan_resources()
473 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_prep_dma_memcpy()  local
476 	dev_dbg(dmac->dev, "%s channel: %d src=0x%pad dst=0x%pad len=%zu\n",  in rz_dmac_prep_dma_memcpy()
550 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_issue_pending()  local
562 				dev_warn(dmac->dev, "ch: %d couldn't issue DMA xfer\n",  in rz_dmac_issue_pending()
640 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_irq_handle_channel()  local
645 		dev_err(dmac->dev, "DMAC err CHSTAT_%d = %08X\n",  in rz_dmac_irq_handle_channel()
706 	struct rz_dmac *dmac = to_rz_dmac(chan->device);  in rz_dmac_chan_filter()  local
715 	return !test_and_set_bit(channel->mid_rid, dmac->modules);  in rz_dmac_chan_filter()
738 static int rz_dmac_chan_probe(struct rz_dmac *dmac,  in rz_dmac_chan_probe()  argument
742 	struct platform_device *pdev = to_platform_device(dmac->dev);  in rz_dmac_chan_probe()
757 	irqname = devm_kasprintf(dmac->dev, GFP_KERNEL, "%s:%u",  in rz_dmac_chan_probe()
758 				 dev_name(dmac->dev), index);  in rz_dmac_chan_probe()
762 	ret = devm_request_threaded_irq(dmac->dev, channel->irq,  in rz_dmac_chan_probe()
767 		dev_err(dmac->dev, "failed to request IRQ %u (%d)\n",  in rz_dmac_chan_probe()
774 		channel->ch_base = dmac->base + CHANNEL_0_7_OFFSET +  in rz_dmac_chan_probe()
776 		channel->ch_cmn_base = dmac->base + CHANNEL_0_7_COMMON_BASE;  in rz_dmac_chan_probe()
778 		channel->ch_base = dmac->base + CHANNEL_8_15_OFFSET +  in rz_dmac_chan_probe()
780 		channel->ch_cmn_base = dmac->base + CHANNEL_8_15_COMMON_BASE;  in rz_dmac_chan_probe()
797 	vchan_init(&channel->vc, &dmac->engine);  in rz_dmac_chan_probe()
805 static int rz_dmac_parse_of(struct device *dev, struct rz_dmac *dmac)  in rz_dmac_parse_of()  argument
810 	ret = of_property_read_u32(np, "dma-channels", &dmac->n_channels);  in rz_dmac_parse_of()
816 	if (!dmac->n_channels || dmac->n_channels > RZ_DMAC_MAX_CHANNELS) {  in rz_dmac_parse_of()
817 		dev_err(dev, "invalid number of channels %u\n", dmac->n_channels);  in rz_dmac_parse_of()
828 	struct rz_dmac *dmac;  in rz_dmac_probe()  local
834 	dmac = devm_kzalloc(&pdev->dev, sizeof(*dmac), GFP_KERNEL);  in rz_dmac_probe()
835 	if (!dmac)  in rz_dmac_probe()
838 	dmac->dev = &pdev->dev;  in rz_dmac_probe()
839 	platform_set_drvdata(pdev, dmac);  in rz_dmac_probe()
841 	ret = rz_dmac_parse_of(&pdev->dev, dmac);  in rz_dmac_probe()
845 	dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,  in rz_dmac_probe()
846 				      sizeof(*dmac->channels), GFP_KERNEL);  in rz_dmac_probe()
847 	if (!dmac->channels)  in rz_dmac_probe()
851 	dmac->base = devm_platform_ioremap_resource(pdev, 0);  in rz_dmac_probe()
852 	if (IS_ERR(dmac->base))  in rz_dmac_probe()
853 		return PTR_ERR(dmac->base);  in rz_dmac_probe()
855 	dmac->ext_base = devm_platform_ioremap_resource(pdev, 1);  in rz_dmac_probe()
856 	if (IS_ERR(dmac->ext_base))  in rz_dmac_probe()
857 		return PTR_ERR(dmac->ext_base);  in rz_dmac_probe()
873 	INIT_LIST_HEAD(&dmac->engine.channels);  in rz_dmac_probe()
875 	for (i = 0; i < dmac->n_channels; i++) {  in rz_dmac_probe()
876 		ret = rz_dmac_chan_probe(dmac, &dmac->channels[i], i);  in rz_dmac_probe()
881 	/* Register the DMAC as a DMA provider for DT. */  in rz_dmac_probe()
888 	engine = &dmac->engine;  in rz_dmac_probe()
891 	rz_dmac_writel(dmac, DCTRL_DEFAULT, CHANNEL_0_7_COMMON_BASE + DCTRL);  in rz_dmac_probe()
892 	rz_dmac_writel(dmac, DCTRL_DEFAULT, CHANNEL_8_15_COMMON_BASE + DCTRL);  in rz_dmac_probe()
920 		struct rz_dmac_chan *channel = &dmac->channels[i];  in rz_dmac_probe()
933 	struct rz_dmac *dmac = platform_get_drvdata(pdev);  in rz_dmac_remove()  local
936 	for (i = 0; i < dmac->n_channels; i++) {  in rz_dmac_remove()
937 		struct rz_dmac_chan *channel = &dmac->channels[i];  in rz_dmac_remove()
945 	dma_async_device_unregister(&dmac->engine);  in rz_dmac_remove()
951 	{ .compatible = "renesas,rz-dmac", },
958 		.name	= "rz-dmac",