Lines Matching +full:ppmu +full:- +full:event3 +full:- +full:dmc0_0
1 // SPDX-License-Identifier: GPL-2.0-only
3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
5 * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd.
20 #include <linux/devfreq-event.h>
22 #include "exynos-ppmu.h"
41 struct exynos_ppmu_data ppmu; member
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
49 { "ppmu-event3-"#name, PPMU_PMNCNT3 }
72 PPMU_EVENT(mfc-left),
73 PPMU_EVENT(mfc-right),
76 PPMU_EVENT(drex0-s0),
77 PPMU_EVENT(drex0-s1),
78 PPMU_EVENT(drex1-s0),
79 PPMU_EVENT(drex1-s1),
90 PPMU_EVENT(d0-cpu),
91 PPMU_EVENT(d0-general),
92 PPMU_EVENT(d0-rt),
93 PPMU_EVENT(d1-cpu),
94 PPMU_EVENT(d1-general),
95 PPMU_EVENT(d1-rt),
98 PPMU_EVENT(dmc0_0),
112 return -EINVAL; in __exynos_ppmu_find_ppmu_id()
117 return __exynos_ppmu_find_ppmu_id(edev->desc->name); in exynos_ppmu_find_ppmu_id()
121 * The devfreq-event ops structure for PPMU v1.1
130 ret = regmap_write(info->regmap, PPMU_CNTENC, in exynos_ppmu_disable()
139 /* Disable PPMU */ in exynos_ppmu_disable()
140 ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); in exynos_ppmu_disable()
145 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_disable()
163 ret = regmap_read(info->regmap, PPMU_CNTENS, &cntens); in exynos_ppmu_set_event()
168 ret = regmap_write(info->regmap, PPMU_CNTENS, cntens); in exynos_ppmu_set_event()
173 ret = regmap_write(info->regmap, PPMU_BEVTxSEL(id), in exynos_ppmu_set_event()
174 edev->desc->event_type); in exynos_ppmu_set_event()
178 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_set_event()
179 ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); in exynos_ppmu_set_event()
189 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_set_event()
207 return -EINVAL; in exynos_ppmu_get_event()
209 /* Disable PPMU */ in exynos_ppmu_get_event()
210 ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); in exynos_ppmu_get_event()
215 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_get_event()
220 ret = regmap_read(info->regmap, PPMU_CCNT, &total_count); in exynos_ppmu_get_event()
223 edata->total_count = total_count; in exynos_ppmu_get_event()
230 ret = regmap_read(info->regmap, PPMU_PMNCT(id), &load_count); in exynos_ppmu_get_event()
233 edata->load_count = load_count; in exynos_ppmu_get_event()
236 ret = regmap_read(info->regmap, PPMU_PMCNT3_HIGH, &pmcnt3_high); in exynos_ppmu_get_event()
240 ret = regmap_read(info->regmap, PPMU_PMCNT3_LOW, &pmcnt3_low); in exynos_ppmu_get_event()
244 edata->load_count = ((pmcnt3_high << 8) | pmcnt3_low); in exynos_ppmu_get_event()
247 return -EINVAL; in exynos_ppmu_get_event()
251 ret = regmap_read(info->regmap, PPMU_CNTENC, &cntenc); in exynos_ppmu_get_event()
256 ret = regmap_write(info->regmap, PPMU_CNTENC, cntenc); in exynos_ppmu_get_event()
260 dev_dbg(&edev->dev, "%s (event: %ld/%ld)\n", edev->desc->name, in exynos_ppmu_get_event()
261 edata->load_count, edata->total_count); in exynos_ppmu_get_event()
273 * The devfreq-event ops structure for PPMU v2.0
284 ret = regmap_write(info->regmap, PPMU_V2_FLAG, clear); in exynos_ppmu_v2_disable()
288 ret = regmap_write(info->regmap, PPMU_V2_INTENC, clear); in exynos_ppmu_v2_disable()
292 ret = regmap_write(info->regmap, PPMU_V2_CNTENC, clear); in exynos_ppmu_v2_disable()
296 ret = regmap_write(info->regmap, PPMU_V2_CNT_RESET, clear); in exynos_ppmu_v2_disable()
300 ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG0, 0x0); in exynos_ppmu_v2_disable()
304 ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG1, 0x0); in exynos_ppmu_v2_disable()
308 ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG2, 0x0); in exynos_ppmu_v2_disable()
312 ret = regmap_write(info->regmap, PPMU_V2_CIG_RESULT, 0x0); in exynos_ppmu_v2_disable()
316 ret = regmap_write(info->regmap, PPMU_V2_CNT_AUTO, 0x0); in exynos_ppmu_v2_disable()
320 ret = regmap_write(info->regmap, PPMU_V2_CH_EV0_TYPE, 0x0); in exynos_ppmu_v2_disable()
324 ret = regmap_write(info->regmap, PPMU_V2_CH_EV1_TYPE, 0x0); in exynos_ppmu_v2_disable()
328 ret = regmap_write(info->regmap, PPMU_V2_CH_EV2_TYPE, 0x0); in exynos_ppmu_v2_disable()
332 ret = regmap_write(info->regmap, PPMU_V2_CH_EV3_TYPE, 0x0); in exynos_ppmu_v2_disable()
336 ret = regmap_write(info->regmap, PPMU_V2_SM_ID_V, 0x0); in exynos_ppmu_v2_disable()
340 ret = regmap_write(info->regmap, PPMU_V2_SM_ID_A, 0x0); in exynos_ppmu_v2_disable()
344 ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_V, 0x0); in exynos_ppmu_v2_disable()
348 ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_A, 0x0); in exynos_ppmu_v2_disable()
352 ret = regmap_write(info->regmap, PPMU_V2_INTERRUPT_RESET, 0x0); in exynos_ppmu_v2_disable()
356 /* Disable PPMU */ in exynos_ppmu_v2_disable()
357 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); in exynos_ppmu_v2_disable()
362 ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); in exynos_ppmu_v2_disable()
377 ret = regmap_read(info->regmap, PPMU_V2_CNTENS, &cntens); in exynos_ppmu_v2_set_event()
382 ret = regmap_write(info->regmap, PPMU_V2_CNTENS, cntens); in exynos_ppmu_v2_set_event()
387 ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), in exynos_ppmu_v2_set_event()
388 edev->desc->event_type); in exynos_ppmu_v2_set_event()
392 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_v2_set_event()
393 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); in exynos_ppmu_v2_set_event()
407 ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); in exynos_ppmu_v2_set_event()
425 /* Disable PPMU */ in exynos_ppmu_v2_get_event()
426 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); in exynos_ppmu_v2_get_event()
431 ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); in exynos_ppmu_v2_get_event()
436 ret = regmap_read(info->regmap, PPMU_V2_CCNT, &total_count); in exynos_ppmu_v2_get_event()
439 edata->total_count = total_count; in exynos_ppmu_v2_get_event()
445 ret = regmap_read(info->regmap, PPMU_V2_PMNCT(id), &count); in exynos_ppmu_v2_get_event()
451 ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_HIGH, in exynos_ppmu_v2_get_event()
456 ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_LOW, &pmcnt_low); in exynos_ppmu_v2_get_event()
463 edata->load_count = load_count; in exynos_ppmu_v2_get_event()
466 ret = regmap_read(info->regmap, PPMU_V2_CNTENC, &cntenc); in exynos_ppmu_v2_get_event()
471 ret = regmap_write(info->regmap, PPMU_V2_CNTENC, cntenc); in exynos_ppmu_v2_get_event()
475 dev_dbg(&edev->dev, "%25s (load: %ld / %ld)\n", edev->desc->name, in exynos_ppmu_v2_get_event()
476 edata->load_count, edata->total_count); in exynos_ppmu_v2_get_event()
488 .compatible = "samsung,exynos-ppmu",
491 .compatible = "samsung,exynos-ppmu-v2",
502 struct device *dev = info->dev; in of_get_devfreq_events()
511 "failed to get child node of devfreq-event devices\n"); in of_get_devfreq_events()
512 return -EINVAL; in of_get_devfreq_events()
518 return -ENOMEM; in of_get_devfreq_events()
519 info->num_events = count; in of_get_devfreq_events()
523 info->ppmu_type = (enum exynos_ppmu_type)of_id->data; in of_get_devfreq_events()
525 return -EINVAL; in of_get_devfreq_events()
544 switch (info->ppmu_type) { in of_get_devfreq_events()
555 of_property_read_string(node, "event-name", &desc[j].name); in of_get_devfreq_events()
556 ret = of_property_read_u32(node, "event-data-type", in of_get_devfreq_events()
563 if (info->ppmu_type == EXYNOS_TYPE_PPMU_V2) { in of_get_devfreq_events()
590 info->desc = desc; in of_get_devfreq_events()
606 struct device *dev = info->dev; in exynos_ppmu_parse_dt()
607 struct device_node *np = dev->of_node; in exynos_ppmu_parse_dt()
614 return -EINVAL; in exynos_ppmu_parse_dt()
617 /* Maps the memory mapped IO to control PPMU register */ in exynos_ppmu_parse_dt()
623 exynos_ppmu_regmap_config.max_register = resource_size(res) - 4; in exynos_ppmu_parse_dt()
624 info->regmap = devm_regmap_init_mmio(dev, base, in exynos_ppmu_parse_dt()
626 if (IS_ERR(info->regmap)) { in exynos_ppmu_parse_dt()
628 return PTR_ERR(info->regmap); in exynos_ppmu_parse_dt()
631 info->ppmu.clk = devm_clk_get(dev, "ppmu"); in exynos_ppmu_parse_dt()
632 if (IS_ERR(info->ppmu.clk)) { in exynos_ppmu_parse_dt()
633 info->ppmu.clk = NULL; in exynos_ppmu_parse_dt()
634 dev_warn(dev, "cannot get PPMU clock\n"); in exynos_ppmu_parse_dt()
639 dev_err(dev, "failed to parse exynos ppmu dt node\n"); in exynos_ppmu_parse_dt()
653 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); in exynos_ppmu_probe()
655 return -ENOMEM; in exynos_ppmu_probe()
657 info->dev = &pdev->dev; in exynos_ppmu_probe()
662 dev_err(&pdev->dev, in exynos_ppmu_probe()
666 desc = info->desc; in exynos_ppmu_probe()
668 size = sizeof(struct devfreq_event_dev *) * info->num_events; in exynos_ppmu_probe()
669 info->edev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); in exynos_ppmu_probe()
670 if (!info->edev) in exynos_ppmu_probe()
671 return -ENOMEM; in exynos_ppmu_probe()
673 edev = info->edev; in exynos_ppmu_probe()
676 for (i = 0; i < info->num_events; i++) { in exynos_ppmu_probe()
677 edev[i] = devm_devfreq_event_add_edev(&pdev->dev, &desc[i]); in exynos_ppmu_probe()
679 dev_err(&pdev->dev, in exynos_ppmu_probe()
680 "failed to add devfreq-event device\n"); in exynos_ppmu_probe()
684 pr_info("exynos-ppmu: new PPMU device registered %s (%s)\n", in exynos_ppmu_probe()
685 dev_name(&pdev->dev), desc[i].name); in exynos_ppmu_probe()
688 ret = clk_prepare_enable(info->ppmu.clk); in exynos_ppmu_probe()
690 dev_err(&pdev->dev, "failed to prepare ppmu clock\n"); in exynos_ppmu_probe()
701 clk_disable_unprepare(info->ppmu.clk); in exynos_ppmu_remove()
710 .name = "exynos-ppmu",
716 MODULE_DESCRIPTION("Exynos PPMU(Platform Performance Monitoring Unit) driver");