Lines Matching full:register
20 * 00h | CRYP_CR | Configuration register
22 * 04h | CRYP_SR | Status register
24 * 08h | CRYP_DIN | Data In register
26 * 0ch | CRYP_DOUT | Data out register
28 * 10h | CRYP_DMACR | DMA control register
41 * Refer data structure for other register map
46 * @cr - Configuration register
47 * @status - Status register
48 * @din - Data input register
49 * @din_size - Data input size register
50 * @dout - Data output register
51 * @dout_size - Data output size register
52 * @dmacr - Dma control register
53 * @imsc - Interrupt mask set/clear register
55 * @mis - Masked interrupt statu register
56 * @key_1_l - Key register 1 L
57 * @key_1_r - Key register 1 R
58 * @key_2_l - Key register 2 L
59 * @key_2_r - Key register 2 R
60 * @key_3_l - Key register 3 L
61 * @key_3_r - Key register 3 R
62 * @key_4_l - Key register 4 L
63 * @key_4_r - Key register 4 R
69 * @itcr - Integration test control register
70 * @itip - Integration test input register
71 * @itop - Integration test output register
73 * @periphId0 - FE0 CRYP Peripheral Identication Register
77 * @pcellId0 - FF0 CRYP PCell Identication Register
83 u32 cr; /* Configuration register */
84 u32 sr; /* Status register */
85 u32 din; /* Data input register */
86 u32 din_size; /* Data input size register */
87 u32 dout; /* Data output register */
88 u32 dout_size; /* Data output size register */
89 u32 dmacr; /* Dma control register */
90 u32 imsc; /* Interrupt mask set/clear register */
92 u32 mis; /* Masked interrupt statu register */
94 u32 key_1_l; /*Key register 1 L */
95 u32 key_1_r; /*Key register 1 R */
96 u32 key_2_l; /*Key register 2 L */
97 u32 key_2_r; /*Key register 2 R */
98 u32 key_3_l; /*Key register 3 L */
99 u32 key_3_r; /*Key register 3 R */
100 u32 key_4_l; /*Key register 4 L */
101 u32 key_4_r; /*Key register 4 R */
109 u32 itcr; /*Integration test control register */
110 u32 itip; /*Integration test input register */
111 u32 itop; /*Integration test output register */
114 u32 periphId0; /* FE0 CRYP Peripheral Identication Register */
119 u32 pcellId0; /* FF0 CRYP PCell Identication Register */