Lines Matching +full:stm32f756 +full:- +full:hash

1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
25 #include <crypto/hash.h>
30 #include <crypto/internal/hash.h>
198 return readl_relaxed(hdev->io_base + offset); in stm32_hash_read()
204 writel_relaxed(value, hdev->io_base + offset); in stm32_hash_write()
211 return readl_relaxed_poll_timeout(hdev->io_base + HASH_SR, status, in stm32_hash_wait_busy()
227 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_write_key()
230 int keylen = ctx->keylen; in stm32_hash_write_key()
231 void *key = ctx->key; in stm32_hash_write_key()
238 keylen -= 4; in stm32_hash_write_key()
246 return -EINPROGRESS; in stm32_hash_write_key()
254 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_write_ctrl()
255 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_write_ctrl()
260 if (!(hdev->flags & HASH_FLAGS_INIT)) { in stm32_hash_write_ctrl()
261 switch (rctx->flags & HASH_FLAGS_ALGO_MASK) { in stm32_hash_write_ctrl()
278 reg |= (rctx->data_type << HASH_CR_DATATYPE_POS); in stm32_hash_write_ctrl()
280 if (rctx->flags & HASH_FLAGS_HMAC) { in stm32_hash_write_ctrl()
281 hdev->flags |= HASH_FLAGS_HMAC; in stm32_hash_write_ctrl()
283 if (ctx->keylen > HASH_LONG_KEY) in stm32_hash_write_ctrl()
291 hdev->flags |= HASH_FLAGS_INIT; in stm32_hash_write_ctrl()
293 dev_dbg(hdev->dev, "Write Control %x\n", reg); in stm32_hash_write_ctrl()
301 while ((rctx->bufcnt < rctx->buflen) && rctx->total) { in stm32_hash_append_sg()
302 count = min(rctx->sg->length - rctx->offset, rctx->total); in stm32_hash_append_sg()
303 count = min(count, rctx->buflen - rctx->bufcnt); in stm32_hash_append_sg()
306 if ((rctx->sg->length == 0) && !sg_is_last(rctx->sg)) { in stm32_hash_append_sg()
307 rctx->sg = sg_next(rctx->sg); in stm32_hash_append_sg()
314 scatterwalk_map_and_copy(rctx->buffer + rctx->bufcnt, rctx->sg, in stm32_hash_append_sg()
315 rctx->offset, count, 0); in stm32_hash_append_sg()
317 rctx->bufcnt += count; in stm32_hash_append_sg()
318 rctx->offset += count; in stm32_hash_append_sg()
319 rctx->total -= count; in stm32_hash_append_sg()
321 if (rctx->offset == rctx->sg->length) { in stm32_hash_append_sg()
322 rctx->sg = sg_next(rctx->sg); in stm32_hash_append_sg()
323 if (rctx->sg) in stm32_hash_append_sg()
324 rctx->offset = 0; in stm32_hash_append_sg()
326 rctx->total = 0; in stm32_hash_append_sg()
339 hdev->flags |= HASH_FLAGS_FINAL; in stm32_hash_xmit_cpu()
343 dev_dbg(hdev->dev, "%s: length: %zd, final: %x len32 %i\n", in stm32_hash_xmit_cpu()
346 hdev->flags |= HASH_FLAGS_CPU; in stm32_hash_xmit_cpu()
351 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
353 if ((hdev->flags & HASH_FLAGS_HMAC) && in stm32_hash_xmit_cpu()
354 (!(hdev->flags & HASH_FLAGS_HMAC_KEY))) { in stm32_hash_xmit_cpu()
355 hdev->flags |= HASH_FLAGS_HMAC_KEY; in stm32_hash_xmit_cpu()
358 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
369 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_xmit_cpu()
371 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
374 return -EINPROGRESS; in stm32_hash_xmit_cpu()
382 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_update_cpu()
385 dev_dbg(hdev->dev, "%s flags %lx\n", __func__, rctx->flags); in stm32_hash_update_cpu()
387 final = (rctx->flags & HASH_FLAGS_FINUP); in stm32_hash_update_cpu()
389 while ((rctx->total >= rctx->buflen) || in stm32_hash_update_cpu()
390 (rctx->bufcnt + rctx->total >= rctx->buflen)) { in stm32_hash_update_cpu()
392 bufcnt = rctx->bufcnt; in stm32_hash_update_cpu()
393 rctx->bufcnt = 0; in stm32_hash_update_cpu()
394 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, bufcnt, 0); in stm32_hash_update_cpu()
400 bufcnt = rctx->bufcnt; in stm32_hash_update_cpu()
401 rctx->bufcnt = 0; in stm32_hash_update_cpu()
402 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, bufcnt, in stm32_hash_update_cpu()
403 (rctx->flags & HASH_FLAGS_FINUP)); in stm32_hash_update_cpu()
417 in_desc = dmaengine_prep_slave_sg(hdev->dma_lch, sg, 1, in stm32_hash_xmit_dma()
421 dev_err(hdev->dev, "dmaengine_prep_slave error\n"); in stm32_hash_xmit_dma()
422 return -ENOMEM; in stm32_hash_xmit_dma()
425 reinit_completion(&hdev->dma_completion); in stm32_hash_xmit_dma()
426 in_desc->callback = stm32_hash_dma_callback; in stm32_hash_xmit_dma()
427 in_desc->callback_param = hdev; in stm32_hash_xmit_dma()
429 hdev->flags |= HASH_FLAGS_FINAL; in stm32_hash_xmit_dma()
430 hdev->flags |= HASH_FLAGS_DMA_ACTIVE; in stm32_hash_xmit_dma()
448 return -ENOMEM; in stm32_hash_xmit_dma()
450 dma_async_issue_pending(hdev->dma_lch); in stm32_hash_xmit_dma()
452 if (!wait_for_completion_timeout(&hdev->dma_completion, in stm32_hash_xmit_dma()
454 err = -ETIMEDOUT; in stm32_hash_xmit_dma()
456 if (dma_async_is_tx_complete(hdev->dma_lch, cookie, in stm32_hash_xmit_dma()
458 err = -ETIMEDOUT; in stm32_hash_xmit_dma()
461 dev_err(hdev->dev, "DMA Error %i\n", err); in stm32_hash_xmit_dma()
462 dmaengine_terminate_all(hdev->dma_lch); in stm32_hash_xmit_dma()
466 return -EINPROGRESS; in stm32_hash_xmit_dma()
473 complete(&hdev->dma_completion); in stm32_hash_dma_callback()
475 hdev->flags |= HASH_FLAGS_DMA_READY; in stm32_hash_dma_callback()
480 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_hmac_dma_send()
481 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_hmac_dma_send()
485 if (ctx->keylen < HASH_DMA_THRESHOLD || (hdev->dma_mode == 1)) { in stm32_hash_hmac_dma_send()
488 return -ETIMEDOUT; in stm32_hash_hmac_dma_send()
490 if (!(hdev->flags & HASH_FLAGS_HMAC_KEY)) in stm32_hash_hmac_dma_send()
491 sg_init_one(&rctx->sg_key, ctx->key, in stm32_hash_hmac_dma_send()
492 ALIGN(ctx->keylen, sizeof(u32))); in stm32_hash_hmac_dma_send()
494 rctx->dma_ct = dma_map_sg(hdev->dev, &rctx->sg_key, 1, in stm32_hash_hmac_dma_send()
496 if (rctx->dma_ct == 0) { in stm32_hash_hmac_dma_send()
497 dev_err(hdev->dev, "dma_map_sg error\n"); in stm32_hash_hmac_dma_send()
498 return -ENOMEM; in stm32_hash_hmac_dma_send()
501 err = stm32_hash_xmit_dma(hdev, &rctx->sg_key, ctx->keylen, 0); in stm32_hash_hmac_dma_send()
503 dma_unmap_sg(hdev->dev, &rctx->sg_key, 1, DMA_TO_DEVICE); in stm32_hash_hmac_dma_send()
518 dma_conf.dst_addr = hdev->phys_base + HASH_DIN; in stm32_hash_dma_init()
520 dma_conf.src_maxburst = hdev->dma_maxburst; in stm32_hash_dma_init()
521 dma_conf.dst_maxburst = hdev->dma_maxburst; in stm32_hash_dma_init()
524 chan = dma_request_chan(hdev->dev, "in"); in stm32_hash_dma_init()
528 hdev->dma_lch = chan; in stm32_hash_dma_init()
530 err = dmaengine_slave_config(hdev->dma_lch, &dma_conf); in stm32_hash_dma_init()
532 dma_release_channel(hdev->dma_lch); in stm32_hash_dma_init()
533 hdev->dma_lch = NULL; in stm32_hash_dma_init()
534 dev_err(hdev->dev, "Couldn't configure DMA slave.\n"); in stm32_hash_dma_init()
538 init_completion(&hdev->dma_completion); in stm32_hash_dma_init()
545 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_dma_send()
549 u32 *buffer = (void *)rctx->buffer; in stm32_hash_dma_send()
551 rctx->sg = hdev->req->src; in stm32_hash_dma_send()
552 rctx->total = hdev->req->nbytes; in stm32_hash_dma_send()
554 rctx->nents = sg_nents(rctx->sg); in stm32_hash_dma_send()
556 if (rctx->nents < 0) in stm32_hash_dma_send()
557 return -EINVAL; in stm32_hash_dma_send()
561 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_dma_send()
563 if (err != -EINPROGRESS) in stm32_hash_dma_send()
567 for_each_sg(rctx->sg, tsg, rctx->nents, i) { in stm32_hash_dma_send()
568 len = sg->length; in stm32_hash_dma_send()
572 if (hdev->dma_mode == 1) { in stm32_hash_dma_send()
573 len = (ALIGN(sg->length, 16) - 16); in stm32_hash_dma_send()
576 rctx->sg, rctx->nents, in stm32_hash_dma_send()
577 rctx->buffer, sg->length - len, in stm32_hash_dma_send()
578 rctx->total - sg->length + len); in stm32_hash_dma_send()
580 sg->length = len; in stm32_hash_dma_send()
582 if (!(IS_ALIGNED(sg->length, sizeof(u32)))) { in stm32_hash_dma_send()
583 len = sg->length; in stm32_hash_dma_send()
584 sg->length = ALIGN(sg->length, in stm32_hash_dma_send()
590 rctx->dma_ct = dma_map_sg(hdev->dev, sg, 1, in stm32_hash_dma_send()
592 if (rctx->dma_ct == 0) { in stm32_hash_dma_send()
593 dev_err(hdev->dev, "dma_map_sg error\n"); in stm32_hash_dma_send()
594 return -ENOMEM; in stm32_hash_dma_send()
600 dma_unmap_sg(hdev->dev, sg, 1, DMA_TO_DEVICE); in stm32_hash_dma_send()
602 if (err == -ENOMEM) in stm32_hash_dma_send()
606 if (hdev->dma_mode == 1) { in stm32_hash_dma_send()
608 return -ETIMEDOUT; in stm32_hash_dma_send()
616 DIV_ROUND_UP(ncp, sizeof(u32)) - ncp); in stm32_hash_dma_send()
617 writesl(hdev->io_base + HASH_DIN, buffer, in stm32_hash_dma_send()
624 err = -EINPROGRESS; in stm32_hash_dma_send()
627 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_dma_send()
629 return -ETIMEDOUT; in stm32_hash_dma_send()
641 if (!ctx->hdev) { in stm32_hash_find_dev()
646 ctx->hdev = hdev; in stm32_hash_find_dev()
648 hdev = ctx->hdev; in stm32_hash_find_dev()
663 if (req->nbytes <= HASH_DMA_THRESHOLD) in stm32_hash_dma_aligned_data()
666 if (sg_nents(req->src) > 1) { in stm32_hash_dma_aligned_data()
667 if (hdev->dma_mode == 1) in stm32_hash_dma_aligned_data()
669 for_each_sg(req->src, sg, sg_nents(req->src), i) { in stm32_hash_dma_aligned_data()
670 if ((!IS_ALIGNED(sg->length, sizeof(u32))) && in stm32_hash_dma_aligned_data()
676 if (req->src->offset % 4) in stm32_hash_dma_aligned_data()
689 rctx->hdev = hdev; in stm32_hash_init()
691 rctx->flags = HASH_FLAGS_CPU; in stm32_hash_init()
693 rctx->digcnt = crypto_ahash_digestsize(tfm); in stm32_hash_init()
694 switch (rctx->digcnt) { in stm32_hash_init()
696 rctx->flags |= HASH_FLAGS_MD5; in stm32_hash_init()
699 rctx->flags |= HASH_FLAGS_SHA1; in stm32_hash_init()
702 rctx->flags |= HASH_FLAGS_SHA224; in stm32_hash_init()
705 rctx->flags |= HASH_FLAGS_SHA256; in stm32_hash_init()
708 return -EINVAL; in stm32_hash_init()
711 rctx->bufcnt = 0; in stm32_hash_init()
712 rctx->buflen = HASH_BUFLEN; in stm32_hash_init()
713 rctx->total = 0; in stm32_hash_init()
714 rctx->offset = 0; in stm32_hash_init()
715 rctx->data_type = HASH_DATA_8_BITS; in stm32_hash_init()
717 memset(rctx->buffer, 0, HASH_BUFLEN); in stm32_hash_init()
719 if (ctx->flags & HASH_FLAGS_HMAC) in stm32_hash_init()
720 rctx->flags |= HASH_FLAGS_HMAC; in stm32_hash_init()
722 dev_dbg(hdev->dev, "%s Flags %lx\n", __func__, rctx->flags); in stm32_hash_init()
734 struct ahash_request *req = hdev->req; in stm32_hash_final_req()
737 int buflen = rctx->bufcnt; in stm32_hash_final_req()
739 rctx->bufcnt = 0; in stm32_hash_final_req()
741 if (!(rctx->flags & HASH_FLAGS_CPU)) in stm32_hash_final_req()
744 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, buflen, 1); in stm32_hash_final_req()
753 __be32 *hash = (void *)rctx->digest; in stm32_hash_copy_hash() local
756 switch (rctx->flags & HASH_FLAGS_ALGO_MASK) { in stm32_hash_copy_hash()
774 hash[i] = cpu_to_be32(stm32_hash_read(rctx->hdev, in stm32_hash_copy_hash()
782 if (!req->result) in stm32_hash_finish()
783 return -EINVAL; in stm32_hash_finish()
785 memcpy(req->result, rctx->digest, rctx->digcnt); in stm32_hash_finish()
793 struct stm32_hash_dev *hdev = rctx->hdev; in stm32_hash_finish_req()
795 if (!err && (HASH_FLAGS_FINAL & hdev->flags)) { in stm32_hash_finish_req()
798 hdev->flags &= ~(HASH_FLAGS_FINAL | HASH_FLAGS_CPU | in stm32_hash_finish_req()
804 rctx->flags |= HASH_FLAGS_ERRORS; in stm32_hash_finish_req()
807 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_finish_req()
808 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_finish_req()
810 crypto_finalize_hash_request(hdev->engine, req, err); in stm32_hash_finish_req()
816 pm_runtime_resume_and_get(hdev->dev); in stm32_hash_hw_init()
818 if (!(HASH_FLAGS_INIT & hdev->flags)) { in stm32_hash_hw_init()
823 hdev->err = 0; in stm32_hash_hw_init()
835 return crypto_transfer_hash_request_to_engine(hdev->engine, req); in stm32_hash_handle_queue()
847 return -ENODEV; in stm32_hash_prepare_req()
849 hdev->req = req; in stm32_hash_prepare_req()
853 dev_dbg(hdev->dev, "processing new req, op: %lu, nbytes %d\n", in stm32_hash_prepare_req()
854 rctx->op, req->nbytes); in stm32_hash_prepare_req()
869 return -ENODEV; in stm32_hash_one_request()
871 hdev->req = req; in stm32_hash_one_request()
875 if (rctx->op == HASH_OP_UPDATE) in stm32_hash_one_request()
877 else if (rctx->op == HASH_OP_FINAL) in stm32_hash_one_request()
880 if (err != -EINPROGRESS) in stm32_hash_one_request()
890 struct stm32_hash_ctx *ctx = crypto_tfm_ctx(req->base.tfm); in stm32_hash_enqueue()
891 struct stm32_hash_dev *hdev = ctx->hdev; in stm32_hash_enqueue()
893 rctx->op = op; in stm32_hash_enqueue()
902 if (!req->nbytes || !(rctx->flags & HASH_FLAGS_CPU)) in stm32_hash_update()
905 rctx->total = req->nbytes; in stm32_hash_update()
906 rctx->sg = req->src; in stm32_hash_update()
907 rctx->offset = 0; in stm32_hash_update()
909 if ((rctx->bufcnt + rctx->total < rctx->buflen)) { in stm32_hash_update()
921 rctx->flags |= HASH_FLAGS_FINUP; in stm32_hash_final()
933 rctx->flags |= HASH_FLAGS_FINUP; in stm32_hash_finup()
935 if (hdev->dma_lch && stm32_hash_dma_aligned_data(req)) in stm32_hash_finup()
936 rctx->flags &= ~HASH_FLAGS_CPU; in stm32_hash_finup()
940 if (err1 == -EINPROGRESS || err1 == -EBUSY) in stm32_hash_finup()
965 pm_runtime_resume_and_get(hdev->dev); in stm32_hash_export()
970 rctx->hw_context = kmalloc_array(3 + HASH_CSR_REGISTER_NUMBER, in stm32_hash_export()
974 preg = rctx->hw_context; in stm32_hash_export()
982 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_export()
983 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_export()
1001 preg = rctx->hw_context; in stm32_hash_import()
1003 pm_runtime_resume_and_get(hdev->dev); in stm32_hash_import()
1014 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_import()
1015 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_import()
1017 kfree(rctx->hw_context); in stm32_hash_import()
1028 memcpy(ctx->key, key, keylen); in stm32_hash_setkey()
1029 ctx->keylen = keylen; in stm32_hash_setkey()
1031 return -ENOMEM; in stm32_hash_setkey()
1045 ctx->keylen = 0; in stm32_hash_cra_init_algs()
1048 ctx->flags |= HASH_FLAGS_HMAC; in stm32_hash_cra_init_algs()
1050 ctx->enginectx.op.do_one_request = stm32_hash_one_request; in stm32_hash_cra_init_algs()
1051 ctx->enginectx.op.prepare_request = stm32_hash_prepare_req; in stm32_hash_cra_init_algs()
1052 ctx->enginectx.op.unprepare_request = NULL; in stm32_hash_cra_init_algs()
1085 if (HASH_FLAGS_CPU & hdev->flags) { in stm32_hash_irq_thread()
1086 if (HASH_FLAGS_OUTPUT_READY & hdev->flags) { in stm32_hash_irq_thread()
1087 hdev->flags &= ~HASH_FLAGS_OUTPUT_READY; in stm32_hash_irq_thread()
1090 } else if (HASH_FLAGS_DMA_READY & hdev->flags) { in stm32_hash_irq_thread()
1091 if (HASH_FLAGS_DMA_ACTIVE & hdev->flags) { in stm32_hash_irq_thread()
1092 hdev->flags &= ~HASH_FLAGS_DMA_ACTIVE; in stm32_hash_irq_thread()
1101 stm32_hash_finish_req(hdev->req, 0); in stm32_hash_irq_thread()
1115 hdev->flags |= HASH_FLAGS_OUTPUT_READY; in stm32_hash_irq_handler()
1138 .cra_driver_name = "stm32-md5",
1164 .cra_driver_name = "stm32-hmac-md5",
1189 .cra_driver_name = "stm32-sha1",
1215 .cra_driver_name = "stm32-hmac-sha1",
1243 .cra_driver_name = "stm32-sha224",
1269 .cra_driver_name = "stm32-hmac-sha224",
1294 .cra_driver_name = "stm32-sha256",
1320 .cra_driver_name = "stm32-hmac-sha256",
1339 for (i = 0; i < hdev->pdata->algs_info_size; i++) { in stm32_hash_register_algs()
1340 for (j = 0; j < hdev->pdata->algs_info[i].size; j++) { in stm32_hash_register_algs()
1342 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_register_algs()
1350 dev_err(hdev->dev, "Algo %d : %d failed\n", i, j); in stm32_hash_register_algs()
1351 for (; i--; ) { in stm32_hash_register_algs()
1352 for (; j--;) in stm32_hash_register_algs()
1354 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_register_algs()
1364 for (i = 0; i < hdev->pdata->algs_info_size; i++) { in stm32_hash_unregister_algs()
1365 for (j = 0; j < hdev->pdata->algs_info[i].size; j++) in stm32_hash_unregister_algs()
1367 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_unregister_algs()
1403 .compatible = "st,stm32f456-hash",
1407 .compatible = "st,stm32f756-hash",
1418 hdev->pdata = of_device_get_match_data(dev); in stm32_hash_get_of_match()
1419 if (!hdev->pdata) { in stm32_hash_get_of_match()
1421 return -EINVAL; in stm32_hash_get_of_match()
1424 if (of_property_read_u32(dev->of_node, "dma-maxburst", in stm32_hash_get_of_match()
1425 &hdev->dma_maxburst)) { in stm32_hash_get_of_match()
1426 dev_info(dev, "dma-maxburst not specified, using 0\n"); in stm32_hash_get_of_match()
1427 hdev->dma_maxburst = 0; in stm32_hash_get_of_match()
1436 struct device *dev = &pdev->dev; in stm32_hash_probe()
1442 return -ENOMEM; in stm32_hash_probe()
1445 hdev->io_base = devm_ioremap_resource(dev, res); in stm32_hash_probe()
1446 if (IS_ERR(hdev->io_base)) in stm32_hash_probe()
1447 return PTR_ERR(hdev->io_base); in stm32_hash_probe()
1449 hdev->phys_base = res->start; in stm32_hash_probe()
1467 hdev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_hash_probe()
1468 if (IS_ERR(hdev->clk)) in stm32_hash_probe()
1469 return dev_err_probe(dev, PTR_ERR(hdev->clk), in stm32_hash_probe()
1470 "failed to get clock for hash\n"); in stm32_hash_probe()
1472 ret = clk_prepare_enable(hdev->clk); in stm32_hash_probe()
1474 dev_err(dev, "failed to enable hash clock (%d)\n", ret); in stm32_hash_probe()
1485 hdev->rst = devm_reset_control_get(&pdev->dev, NULL); in stm32_hash_probe()
1486 if (IS_ERR(hdev->rst)) { in stm32_hash_probe()
1487 if (PTR_ERR(hdev->rst) == -EPROBE_DEFER) { in stm32_hash_probe()
1488 ret = -EPROBE_DEFER; in stm32_hash_probe()
1492 reset_control_assert(hdev->rst); in stm32_hash_probe()
1494 reset_control_deassert(hdev->rst); in stm32_hash_probe()
1497 hdev->dev = dev; in stm32_hash_probe()
1505 case -ENOENT: in stm32_hash_probe()
1513 list_add_tail(&hdev->list, &stm32_hash.dev_list); in stm32_hash_probe()
1517 hdev->engine = crypto_engine_alloc_init(dev, 1); in stm32_hash_probe()
1518 if (!hdev->engine) { in stm32_hash_probe()
1519 ret = -ENOMEM; in stm32_hash_probe()
1523 ret = crypto_engine_start(hdev->engine); in stm32_hash_probe()
1527 hdev->dma_mode = stm32_hash_read(hdev, HASH_HWCFGR); in stm32_hash_probe()
1534 dev_info(dev, "Init HASH done HW ver %x DMA mode %u\n", in stm32_hash_probe()
1535 stm32_hash_read(hdev, HASH_VER), hdev->dma_mode); in stm32_hash_probe()
1543 crypto_engine_exit(hdev->engine); in stm32_hash_probe()
1546 list_del(&hdev->list); in stm32_hash_probe()
1549 if (hdev->dma_lch) in stm32_hash_probe()
1550 dma_release_channel(hdev->dma_lch); in stm32_hash_probe()
1555 clk_disable_unprepare(hdev->clk); in stm32_hash_probe()
1567 return -ENODEV; in stm32_hash_remove()
1569 ret = pm_runtime_resume_and_get(hdev->dev); in stm32_hash_remove()
1575 crypto_engine_exit(hdev->engine); in stm32_hash_remove()
1578 list_del(&hdev->list); in stm32_hash_remove()
1581 if (hdev->dma_lch) in stm32_hash_remove()
1582 dma_release_channel(hdev->dma_lch); in stm32_hash_remove()
1584 pm_runtime_disable(hdev->dev); in stm32_hash_remove()
1585 pm_runtime_put_noidle(hdev->dev); in stm32_hash_remove()
1587 clk_disable_unprepare(hdev->clk); in stm32_hash_remove()
1597 clk_disable_unprepare(hdev->clk); in stm32_hash_runtime_suspend()
1607 ret = clk_prepare_enable(hdev->clk); in stm32_hash_runtime_resume()
1609 dev_err(hdev->dev, "Failed to prepare_enable clock\n"); in stm32_hash_runtime_resume()
1628 .name = "stm32-hash",