Lines Matching refs:rdmsrl
570 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); in update_turbo_state()
1028 rdmsrl(MSR_IA32_POWER_CTL, power_ctl); in set_power_ctl_ee_state()
1419 rdmsrl(MSR_IA32_POWER_CTL, power_ctl); in show_energy_efficiency()
1564 rdmsrl(MSR_ATOM_CORE_RATIOS, value); in atom_get_min_pstate()
1572 rdmsrl(MSR_ATOM_CORE_RATIOS, value); in atom_get_max_pstate()
1580 rdmsrl(MSR_ATOM_CORE_TURBO_RATIOS, value); in atom_get_turbo_pstate()
1615 rdmsrl(MSR_FSB_FREQ, value); in silvermont_get_scaling()
1631 rdmsrl(MSR_FSB_FREQ, value); in airmont_get_scaling()
1642 rdmsrl(MSR_ATOM_CORE_VIDS, value); in atom_get_vid()
1650 rdmsrl(MSR_ATOM_CORE_TURBO_VIDS, value); in atom_get_vid()
1658 rdmsrl(MSR_PLATFORM_INFO, value); in core_get_min_pstate()
1666 rdmsrl(MSR_PLATFORM_INFO, value); in core_get_max_pstate_physical()
1711 rdmsrl(MSR_PLATFORM_INFO, plat_info); in core_get_max_pstate()
1743 rdmsrl(MSR_TURBO_RATIO_LIMIT, value); in core_get_turbo_pstate()
1777 rdmsrl(MSR_TURBO_RATIO_LIMIT, value); in knl_get_turbo_pstate()
2008 rdmsrl(MSR_IA32_APERF, aperf); in intel_pstate_sample()
2009 rdmsrl(MSR_IA32_MPERF, mperf); in intel_pstate_sample()
3139 rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr); in intel_pstate_platform_pwr_mgmt_exists()
3196 rdmsrl(MSR_PM_ENABLE, value); in intel_pstate_hwp_is_enabled()