25  * two ASICs, it can detect polarity changes on up to 48 I/O lines. Since
36  * To use edge-detection IRQ support, pass the IRQs of both ASICS (for the
125 	struct pcmuio_asic asics[PCMUIO_MAX_ASICS];  member
157 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_write()
180 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_read()
289 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_stop_intr()
305 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_handle_intr_subdev()
340 	/* there are could be two asics so we can't use dev->read_subdev */  in pcmuio_handle_asic_interrupt()
380 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_start_intr()
411 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_cancel()
429 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_inttrig_start_intr()
453 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_cmd()
538 		struct pcmuio_asic *chip = &devpriv->asics[i];  in pcmuio_attach()
556 			/* the same irq (or none) is used by both asics */  in pcmuio_attach()