20  * (in the 96-DIO version) WS16C48 ASIC HighDensity I/O Chips (HDIO). This
37  * 96 channel version) or just 1 ASIC (for 48-channel version). Then, use
56  * subdev 0, channels 0-24  (first 24 channels of 1st ASIC)
57  * subdev 2, channels 0-24  (first 24 channels of 2nd ASIC)
61  *  [1] - IRQ (for first ASIC, or first 24 channels)
62  *  [2] - IRQ (for second ASIC, pcmuio96 only - IRQ for chans 48-72
130 					       int asic)  in pcmuio_asic_iobase()  argument
132 	return dev->iobase + (asic * PCMUIO_ASIC_IOSIZE);  in pcmuio_asic_iobase()
138 	 * subdevice 0 and 1 are handled by the first asic  in pcmuio_subdevice_to_asic()
139 	 * subdevice 2 and 3 are handled by the second asic  in pcmuio_subdevice_to_asic()
154 			 int asic, int page, int port)  in pcmuio_write()  argument
157 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_write()
158 	unsigned long iobase = pcmuio_asic_iobase(dev, asic);  in pcmuio_write()
177 				int asic, int page, int port)  in pcmuio_read()  argument
180 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_read()
181 	unsigned long iobase = pcmuio_asic_iobase(dev, asic);  in pcmuio_read()
217 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_dio_insn_bits()  local
235 		pcmuio_write(dev, val, asic, 0, port);  in pcmuio_dio_insn_bits()
239 	val = pcmuio_read(dev, asic, 0, port);  in pcmuio_dio_insn_bits()
252 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_dio_insn_config()  local
261 		pcmuio_write(dev, s->io_bits, asic, 0, port);  in pcmuio_dio_insn_config()
269 	int asic;  in pcmuio_reset()  local
271 	for (asic = 0; asic < board->num_asics; ++asic) {  in pcmuio_reset()
273 		pcmuio_write(dev, 0, asic, 0, 0);  in pcmuio_reset()
274 		pcmuio_write(dev, 0, asic, 0, 3);  in pcmuio_reset()
277 		pcmuio_write(dev, 0, asic, PCMUIO_PAGE_POL, 0);  in pcmuio_reset()
278 		pcmuio_write(dev, 0, asic, PCMUIO_PAGE_ENAB, 0);  in pcmuio_reset()
279 		pcmuio_write(dev, 0, asic, PCMUIO_PAGE_INT_ID, 0);  in pcmuio_reset()
288 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_stop_intr()  local
289 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_stop_intr()
296 	pcmuio_write(dev, 0, asic, PCMUIO_PAGE_ENAB, 0);  in pcmuio_stop_intr()
304 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_handle_intr_subdev()  local
305 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_handle_intr_subdev()
338 static int pcmuio_handle_asic_interrupt(struct comedi_device *dev, int asic)  in pcmuio_handle_asic_interrupt()  argument
341 	struct comedi_subdevice *s = &dev->subdevices[asic * 2];  in pcmuio_handle_asic_interrupt()
342 	unsigned long iobase = pcmuio_asic_iobase(dev, asic);  in pcmuio_handle_asic_interrupt()
351 	val = pcmuio_read(dev, asic, PCMUIO_PAGE_INT_ID, 0);  in pcmuio_handle_asic_interrupt()
352 	pcmuio_write(dev, 0, asic, PCMUIO_PAGE_INT_ID, 0);  in pcmuio_handle_asic_interrupt()
379 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_start_intr()  local
380 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_start_intr()
403 	pcmuio_write(dev, pol_bits, asic, PCMUIO_PAGE_POL, 0);  in pcmuio_start_intr()
404 	pcmuio_write(dev, bits, asic, PCMUIO_PAGE_ENAB, 0);  in pcmuio_start_intr()
410 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_cancel()  local
411 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_cancel()
428 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_inttrig_start_intr()  local
429 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_inttrig_start_intr()
452 	int asic = pcmuio_subdevice_to_asic(s);  in pcmuio_cmd()  local
453 	struct pcmuio_asic *chip = &devpriv->asics[asic];  in pcmuio_cmd()
547 		/* request the irq for the 1st asic */  in pcmuio_attach()
559 			/* request the irq for the 2nd asic */  in pcmuio_attach()