Lines Matching +full:multi +full:- +full:system
1 # SPDX-License-Identifier: GPL-2.0-only
164 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
185 Support for Multi Timer Unit. MTU provides access
187 32-bit free running decrementing counters.
222 bool "Integrator-AP timer driver" if COMPILE_TEST
225 Enables support for the Integrator-AP timer.
250 available on many OMAP-like platforms.
269 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
273 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
278 bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST
282 This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP).
300 power-of-2 divisor of the clock rate. The behaviour can also be
303 The main use of the event stream is wfe-based timeouts of userspace
314 bool "Workaround for Freescale/NXP Erratum A-008585"
320 A-008585 ("ARM generic timer may contain an erroneous
322 fsl,erratum-a008585 property is found in the timer node.
331 161010101. The workaround will be active if the hisilicon,erratum-161010101
335 bool "Workaround for Cortex-A73 erratum 858921"
340 This option enables a workaround applicable to Cortex-A73
353 allwinner,erratum-unknown1 property is found in the timer node.
390 bool "Support for the ARMv7M system time" if COMPILE_TEST
394 This option enables support for the ARMv7M system timer unit.
419 bool "Exynos multi core timer driver" if COMPILE_TEST
422 Support for Multi Core Timer controller on Exynos SoCs.
483 bool "J-Core PIT timer driver" if COMPILE_TEST
489 the integrated PIT in the J-Core synthesizable, open source SoC.
497 the Compare Match Timer (CMT) hardware available in 16/32/48-bit
505 This enables build of a clockevent driver for the Multi-Function
507 This hardware comes with 16-bit timer registers.
522 the 32-bit Timer Unit (TMU) hardware available on a wide range
531 the 48-bit System Timer (STI) hardware available on a SoCs
549 counter available in the "System Registers" block of
559 bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
563 This enables OST0 support available on PXA and SA-11x0
601 bool "i.MX system counter timer" if COMPILE_TEST
604 Enable this option to use i.MX system counter timer as a
626 bool "Timer for the RISC-V platform" if COMPILE_TEST
631 This enables the per-hart timer built into all RISC-V systems, which
633 required for all RISC-V systems.
636 bool "CLINT Timer for the RISC-V platform" if COMPILE_TEST
641 This option enables the CLINT timer for RISC-V systems. The CLINT
642 driver is usually used for NoMMU RISC-V systems.
645 bool "SMP Timer for the C-SKY platform" if COMPILE_TEST
649 Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
650 system.
651 csky,mptimer is not only used in SMP system, it also could be used in
652 single core system. It's not a mmio reg and it uses mtcr/mfcr instruction.
655 bool "Gx6605s SOC system timer driver" if COMPILE_TEST
698 Support for the Operating System Timer of the Ingenic JZ SoCs.
707 based system. It supports the oneshot, the periodic