1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2015 Chen-Yu Tsai
5  * Chen-Yu Tsai	<wens@csie.org>
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
29 	struct clk			*clk;  member
42 	void __iomem *reg = data->membase + SUN9I_MMC_WIDTH * id;  in sun9i_mmc_reset_assert()
45 	clk_prepare_enable(data->clk);  in sun9i_mmc_reset_assert()
46 	spin_lock_irqsave(&data->lock, flags);  in sun9i_mmc_reset_assert()
51 	spin_unlock_irqrestore(&data->lock, flags);  in sun9i_mmc_reset_assert()
52 	clk_disable_unprepare(data->clk);  in sun9i_mmc_reset_assert()
64 	void __iomem *reg = data->membase + SUN9I_MMC_WIDTH * id;  in sun9i_mmc_reset_deassert()
67 	clk_prepare_enable(data->clk);  in sun9i_mmc_reset_deassert()
68 	spin_lock_irqsave(&data->lock, flags);  in sun9i_mmc_reset_deassert()
73 	spin_unlock_irqrestore(&data->lock, flags);  in sun9i_mmc_reset_deassert()
74 	clk_disable_unprepare(data->clk);  in sun9i_mmc_reset_deassert()
97 	struct device_node *np = pdev->dev.of_node;  in sun9i_a80_mmc_config_clk_probe()
100 	const char *clk_name = np->name;  in sun9i_a80_mmc_config_clk_probe()
105 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);  in sun9i_a80_mmc_config_clk_probe()
107 		return -ENOMEM;  in sun9i_a80_mmc_config_clk_probe()
109 	spin_lock_init(&data->lock);  in sun9i_a80_mmc_config_clk_probe()
114 	data->membase = devm_ioremap_resource(&pdev->dev, r);  in sun9i_a80_mmc_config_clk_probe()
115 	if (IS_ERR(data->membase))  in sun9i_a80_mmc_config_clk_probe()
116 		return PTR_ERR(data->membase);  in sun9i_a80_mmc_config_clk_probe()
118 	clk_data = &data->clk_data;  in sun9i_a80_mmc_config_clk_probe()
119 	clk_data->clk_num = count;  in sun9i_a80_mmc_config_clk_probe()
120 	clk_data->clks = devm_kcalloc(&pdev->dev, count, sizeof(struct clk *),  in sun9i_a80_mmc_config_clk_probe()
122 	if (!clk_data->clks)  in sun9i_a80_mmc_config_clk_probe()
123 		return -ENOMEM;  in sun9i_a80_mmc_config_clk_probe()
125 	data->clk = devm_clk_get(&pdev->dev, NULL);  in sun9i_a80_mmc_config_clk_probe()
126 	if (IS_ERR(data->clk)) {  in sun9i_a80_mmc_config_clk_probe()
127 		dev_err(&pdev->dev, "Could not get clock\n");  in sun9i_a80_mmc_config_clk_probe()
128 		return PTR_ERR(data->clk);  in sun9i_a80_mmc_config_clk_probe()
131 	data->reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);  in sun9i_a80_mmc_config_clk_probe()
132 	if (IS_ERR(data->reset)) {  in sun9i_a80_mmc_config_clk_probe()
133 		dev_err(&pdev->dev, "Could not get reset control\n");  in sun9i_a80_mmc_config_clk_probe()
134 		return PTR_ERR(data->reset);  in sun9i_a80_mmc_config_clk_probe()
137 	ret = reset_control_deassert(data->reset);  in sun9i_a80_mmc_config_clk_probe()
139 		dev_err(&pdev->dev, "Reset deassert err %d\n", ret);  in sun9i_a80_mmc_config_clk_probe()
143 	clk_parent = __clk_get_name(data->clk);  in sun9i_a80_mmc_config_clk_probe()
145 		of_property_read_string_index(np, "clock-output-names",  in sun9i_a80_mmc_config_clk_probe()
148 		clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,  in sun9i_a80_mmc_config_clk_probe()
150 						      data->membase + SUN9I_MMC_WIDTH * i,  in sun9i_a80_mmc_config_clk_probe()
152 						      &data->lock);  in sun9i_a80_mmc_config_clk_probe()
154 		if (IS_ERR(clk_data->clks[i])) {  in sun9i_a80_mmc_config_clk_probe()
155 			ret = PTR_ERR(clk_data->clks[i]);  in sun9i_a80_mmc_config_clk_probe()
164 	data->rcdev.owner = THIS_MODULE;  in sun9i_a80_mmc_config_clk_probe()
165 	data->rcdev.nr_resets = count;  in sun9i_a80_mmc_config_clk_probe()
166 	data->rcdev.ops = &sun9i_mmc_reset_ops;  in sun9i_a80_mmc_config_clk_probe()
167 	data->rcdev.of_node = pdev->dev.of_node;  in sun9i_a80_mmc_config_clk_probe()
169 	ret = reset_controller_register(&data->rcdev);  in sun9i_a80_mmc_config_clk_probe()
182 		clk_unregister(clk_data->clks[i]);  in sun9i_a80_mmc_config_clk_probe()
185 	reset_control_assert(data->reset);  in sun9i_a80_mmc_config_clk_probe()
191 	{ .compatible = "allwinner,sun9i-a80-mmc-config-clk" },
197 		.name = "sun9i-a80-mmc-config-clk",