Lines Matching +full:vco +full:- +full:offset

1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/clk-provider.h>
8 #include "clk-regmap.h"
52 #define VCO(a, b, c) { \  macro
59  * struct clk_alpha_pll - phase locked loop (PLL)
60  * @offset: base address of registers
61  * @vco_table: array of VCO settings
66 	u32 offset;  member
80  * struct clk_alpha_pll_postdiv - phase locked loop (PLL) post-divider
81  * @offset: base address of registers
83  * @width: width of post-divider
84  * @post_div_shift: shift to differentiate between odd & even post-divider
85  * @post_div_table: table with PLL odd and even post-divider settings
86  * @num_post_div: Number of PLL post-divider settings
91 	u32 offset;  member