Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0+
3 * Amlogic Meson-G12A Clock Controller Driver
13 #include <linux/clk-provider.h>
20 #include "clk-mpll.h"
21 #include "clk-pll.h"
22 #include "clk-regmap.h"
23 #include "clk-cpu-dyndiv.h"
24 #include "vid-pll-div.h"
25 #include "meson-eeclk.h"
31 .data = &(struct meson_clk_pll_data){
34 .shift = 28,
39 .shift = 0,
44 .shift = 10,
49 .shift = 0,
54 .shift = 31,
59 .shift = 29,
74 .data = &(struct clk_regmap_div_data){
76 .shift = 16,
100 .data = &(struct meson_clk_pll_data){
103 .shift = 28,
108 .shift = 0,
113 .shift = 10,
118 .shift = 31,
123 .shift = 29,
141 .data = &(struct clk_regmap_div_data){
143 .shift = 16,
159 .data = &(struct meson_clk_pll_data){
162 .shift = 28,
167 .shift = 0,
172 .shift = 10,
177 .shift = 31,
182 .shift = 29,
200 .data = &(struct clk_regmap_div_data){
202 .shift = 16,
218 .data = &(struct clk_regmap_gate_data){
235 .data = &(struct clk_regmap_gate_data){
291 .data = &(struct clk_regmap_gate_data){
309 * b) CCF has a clock hand-off mechanism to make the sure the
328 .data = &(struct clk_regmap_gate_data){
345 * b) CCF has a clock hand-off mechanism to make the sure the
354 .data = &(struct clk_regmap_mux_data){
357 .shift = 0,
375 .data = &(struct clk_regmap_mux_data){
378 .shift = 16,
389 /* This sub-tree is used a parking clock */
396 .data = &(struct meson_clk_cpu_dyndiv_data){
399 .shift = 4,
404 .shift = 26,
421 .data = &(struct clk_regmap_mux_data){
424 .shift = 2,
441 .data = &(struct clk_regmap_div_data){
443 .shift = 20,
458 .data = &(struct clk_regmap_mux_data){
461 .shift = 18,
471 /* This sub-tree is used a parking clock */
478 .data = &(struct clk_regmap_mux_data){
481 .shift = 10,
498 .data = &(struct clk_regmap_mux_data){
501 .shift = 11,
518 .data = &(struct clk_regmap_mux_data){
521 .shift = 11,
538 .data = &(struct clk_regmap_mux_data){
541 .shift = 0,
559 .data = &(struct meson_clk_cpu_dyndiv_data){
562 .shift = 4,
567 .shift = 26,
584 .data = &(struct clk_regmap_mux_data){
587 .shift = 2,
604 .data = &(struct clk_regmap_mux_data){
607 .shift = 16,
618 /* This sub-tree is used a parking clock */
625 .data = &(struct clk_regmap_div_data){
627 .shift = 20,
642 .data = &(struct clk_regmap_mux_data){
645 .shift = 18,
655 /* This sub-tree is used a parking clock */
662 .data = &(struct clk_regmap_mux_data){
665 .shift = 10,
682 .data = &(struct clk_regmap_mux_data){
685 .shift = 11,
704 .data = &(struct clk_regmap_mux_data){
707 .shift = 0,
724 .data = &(struct clk_regmap_mux_data){
727 .shift = 16,
744 .data = &(struct clk_regmap_div_data){
746 .shift = 4,
761 .data = &(struct clk_regmap_mux_data){
764 .shift = 2,
779 .data = &(struct clk_regmap_div_data){
781 .shift = 20,
796 .data = &(struct clk_regmap_mux_data){
799 .shift = 18,
814 .data = &(struct clk_regmap_mux_data){
817 .shift = 10,
832 .data = &(struct clk_regmap_mux_data){
835 .shift = 11,
850 .data = &(struct clk_regmap_mux_data){
853 .shift = 24,
868 .data = &(struct clk_regmap_mux_data){
871 .shift = 25,
886 .data = &(struct clk_regmap_mux_data){
889 .shift = 26,
904 .data = &(struct clk_regmap_mux_data){
907 .shift = 27,
921 unsigned long event, void *data) in g12a_cpu_clk_mux_notifier_cb() argument
946 unsigned long event, void *data) in g12a_cpu_clk_postmux_notifier_cb() argument
957 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
958 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
959 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
960 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
961 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
963 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
964 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
968 clk_hw_set_parent(nb_data->cpu_clk_premux1, in g12a_cpu_clk_postmux_notifier_cb()
969 nb_data->xtal); in g12a_cpu_clk_postmux_notifier_cb()
972 clk_hw_set_parent(nb_data->cpu_clk_postmux1, in g12a_cpu_clk_postmux_notifier_cb()
973 nb_data->cpu_clk_premux1); in g12a_cpu_clk_postmux_notifier_cb()
976 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
977 nb_data->cpu_clk_postmux1); in g12a_cpu_clk_postmux_notifier_cb()
982 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
983 * \- cpu_clk_postmux1 in g12a_cpu_clk_postmux_notifier_cb()
984 * \- cpu_clk_premux1 in g12a_cpu_clk_postmux_notifier_cb()
985 * \- xtal in g12a_cpu_clk_postmux_notifier_cb()
1000 clk_hw_set_parent(nb_data->cpu_clk_dyn, in g12a_cpu_clk_postmux_notifier_cb()
1001 nb_data->cpu_clk_postmux0); in g12a_cpu_clk_postmux_notifier_cb()
1006 * \- cpu_clk_dyn in g12a_cpu_clk_postmux_notifier_cb()
1007 * \- cpu_clk_postmux0 in g12a_cpu_clk_postmux_notifier_cb()
1008 * \- cpu_clk_muxX_div in g12a_cpu_clk_postmux_notifier_cb()
1009 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1010 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1012 * \- cpu_clk_premux0 in g12a_cpu_clk_postmux_notifier_cb()
1013 * \- fclk_div3 or fclk_div2 in g12a_cpu_clk_postmux_notifier_cb()
1049 unsigned long event, void *data) in g12a_sys_pll_notifier_cb() argument
1060 * \- sys_pll in g12a_sys_pll_notifier_cb()
1061 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1065 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1066 nb_data->cpu_clk_dyn); in g12a_sys_pll_notifier_cb()
1071 * \- cpu_clk_dyn in g12a_sys_pll_notifier_cb()
1072 * \- cpu_clk_dynX in g12a_sys_pll_notifier_cb()
1073 * \- cpu_clk_dynX_sel in g12a_sys_pll_notifier_cb()
1074 * \- cpu_clk_dynX_div in g12a_sys_pll_notifier_cb()
1075 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1076 * \- xtal/fclk_div2/fclk_div3 in g12a_sys_pll_notifier_cb()
1090 clk_hw_set_parent(nb_data->cpu_clk, in g12a_sys_pll_notifier_cb()
1091 nb_data->sys_pll); in g12a_sys_pll_notifier_cb()
1097 * \- sys_pll in g12a_sys_pll_notifier_cb()
1098 * \- sys_pll_dco in g12a_sys_pll_notifier_cb()
1132 .data = &(struct clk_regmap_gate_data){
1151 .data = &(struct clk_regmap_gate_data){
1196 .data = &(struct clk_regmap_div_data){
1198 .shift = 3,
1211 .data = &(struct clk_regmap_gate_data){
1230 .data = &(struct clk_regmap_div_data){
1232 .shift = 6,
1245 .data = &(struct clk_regmap_gate_data){
1264 .data = &(struct clk_regmap_div_data){
1266 .shift = 9,
1279 .data = &(struct clk_regmap_gate_data){
1298 .data = &(struct clk_regmap_div_data){
1300 .shift = 20,
1316 .index = -1,
1323 .data = &(struct clk_regmap_gate_data){
1434 .data = &(struct clk_regmap_mux_data){
1437 .shift = 3,
1457 .data = &(struct clk_regmap_gate_data){
1477 .data = &(struct clk_regmap_mux_data){
1480 .shift = 6,
1500 .data = &(struct clk_regmap_gate_data){
1520 .data = &(struct clk_regmap_mux_data){
1523 .shift = 9,
1543 .data = &(struct clk_regmap_gate_data){
1563 .data = &(struct clk_regmap_mux_data){
1566 .shift = 20,
1586 .data = &(struct clk_regmap_gate_data){
1623 .data = &(struct meson_clk_pll_data){
1626 .shift = 28,
1631 .shift = 0,
1636 .shift = 10,
1641 .shift = 0,
1646 .shift = 31,
1651 .shift = 29,
1669 .data = &(struct clk_regmap_div_data){
1671 .shift = 16,
1688 .data = &(struct meson_clk_pll_data){
1691 .shift = 28,
1696 .shift = 0,
1701 .shift = 10,
1706 .shift = 0,
1711 .shift = 31,
1716 .shift = 29,
1733 .data = &(struct clk_regmap_div_data){
1735 .shift = 16,
1763 .data = &(struct meson_clk_pll_data){
1766 .shift = 28,
1771 .shift = 0,
1776 .shift = 10,
1781 .shift = 0,
1786 .shift = 31,
1791 .shift = 29,
1810 .data = &(struct clk_regmap_div_data){
1812 .shift = 16,
1855 .data = &(struct meson_clk_pll_data){
1858 .shift = 28,
1863 .shift = 0,
1868 .shift = 10,
1873 .shift = 0,
1878 .shift = 31,
1883 .shift = 29,
1915 .data = &(struct clk_regmap_div_data){
1917 .shift = 16,
1949 .data = &(struct meson_clk_pll_data){
1952 .shift = 28,
1957 .shift = 0,
1962 .shift = 10,
1967 .shift = 0,
1972 .shift = 30,
1977 .shift = 29,
1997 .data = &(struct clk_regmap_div_data){
1999 .shift = 16,
2015 .data = &(struct clk_regmap_div_data){
2017 .shift = 18,
2033 .data = &(struct clk_regmap_div_data){
2035 .shift = 20,
2062 .data = &(struct clk_regmap_gate_data){
2088 .data = &(struct clk_regmap_gate_data){
2114 .data = &(struct clk_regmap_gate_data){
2142 .data = &(struct clk_regmap_gate_data){
2170 .data = &(struct clk_regmap_mux_data){
2173 .shift = 5,
2204 .data = &(struct meson_clk_mpll_data){
2207 .shift = 0,
2212 .shift = 30,
2217 .shift = 20,
2222 .shift = 29,
2240 .data = &(struct clk_regmap_gate_data){
2258 .data = &(struct meson_clk_mpll_data){
2261 .shift = 0,
2266 .shift = 30,
2271 .shift = 20,
2276 .shift = 29,
2294 .data = &(struct clk_regmap_gate_data){
2312 .data = &(struct meson_clk_mpll_data){
2315 .shift = 0,
2320 .shift = 30,
2325 .shift = 20,
2330 .shift = 29,
2348 .data = &(struct clk_regmap_gate_data){
2366 .data = &(struct meson_clk_mpll_data){
2369 .shift = 0,
2374 .shift = 30,
2379 .shift = 20,
2384 .shift = 29,
2402 .data = &(struct clk_regmap_gate_data){
2427 .data = &(struct clk_regmap_mux_data){
2430 .shift = 12,
2442 .data = &(struct clk_regmap_div_data){
2444 .shift = 0,
2459 .data = &(struct clk_regmap_gate_data){
2490 .data = &(struct clk_regmap_mux_data){
2493 .shift = 9,
2505 .data = &(struct clk_regmap_div_data){
2507 .shift = 0,
2522 .data = &(struct clk_regmap_gate_data){
2539 .data = &(struct clk_regmap_mux_data){
2542 .shift = 25,
2554 .data = &(struct clk_regmap_div_data){
2556 .shift = 16,
2571 .data = &(struct clk_regmap_gate_data){
2588 .data = &(struct clk_regmap_mux_data){
2591 .shift = 9,
2603 .data = &(struct clk_regmap_div_data){
2605 .shift = 0,
2620 .data = &(struct clk_regmap_gate_data){
2638 .data = &(struct meson_vid_pll_div_data){
2641 .shift = 0,
2646 .shift = 16,
2665 .data = &(struct clk_regmap_mux_data){
2668 .shift = 18,
2684 .data = &(struct clk_regmap_gate_data){
2713 .data = &(struct clk_regmap_mux_data){
2716 .shift = 9,
2728 .data = &(struct clk_regmap_div_data){
2730 .shift = 0,
2743 .data = &(struct clk_regmap_gate_data){
2757 .data = &(struct clk_regmap_mux_data){
2760 .shift = 25,
2772 .data = &(struct clk_regmap_div_data){
2774 .shift = 16,
2787 .data = &(struct clk_regmap_gate_data){
2801 .data = &(struct clk_regmap_mux_data){
2804 .shift = 31,
2835 .data = &(struct clk_regmap_mux_data){
2838 .shift = 9,
2851 .data = &(struct clk_regmap_div_data){
2853 .shift = 0,
2869 .data = &(struct clk_regmap_gate_data){
2885 .data = &(struct clk_regmap_mux_data){
2888 .shift = 9,
2901 .data = &(struct clk_regmap_div_data){
2903 .shift = 0,
2919 .data = &(struct clk_regmap_gate_data){
2935 .data = &(struct clk_regmap_mux_data){
2938 .shift = 25,
2951 .data = &(struct clk_regmap_div_data){
2953 .shift = 16,
2969 .data = &(struct clk_regmap_gate_data){
2998 .data = &(struct clk_regmap_mux_data){
3001 .shift = 9,
3013 .data = &(struct clk_regmap_div_data){
3015 .shift = 0,
3030 .data = &(struct clk_regmap_gate_data){
3046 .data = &(struct clk_regmap_mux_data){
3049 .shift = 25,
3061 .data = &(struct clk_regmap_div_data){
3063 .shift = 16,
3078 .data = &(struct clk_regmap_gate_data){
3094 .data = &(struct clk_regmap_mux_data){
3097 .shift = 31,
3116 .data = &(struct clk_regmap_gate_data){
3141 .data = &(struct clk_regmap_mux_data){
3144 .shift = 16,
3156 .data = &(struct clk_regmap_mux_data){
3159 .shift = 16,
3171 .data = &(struct clk_regmap_gate_data){
3185 .data = &(struct clk_regmap_gate_data){
3199 .data = &(struct clk_regmap_div_data){
3201 .shift = 0,
3216 .data = &(struct clk_regmap_div_data){
3218 .shift = 0,
3233 .data = &(struct clk_regmap_gate_data){
3247 .data = &(struct clk_regmap_gate_data){
3261 .data = &(struct clk_regmap_gate_data){
3275 .data = &(struct clk_regmap_gate_data){
3289 .data = &(struct clk_regmap_gate_data){
3303 .data = &(struct clk_regmap_gate_data){
3317 .data = &(struct clk_regmap_gate_data){
3331 .data = &(struct clk_regmap_gate_data){
3345 .data = &(struct clk_regmap_gate_data){
3359 .data = &(struct clk_regmap_gate_data){
3373 .data = &(struct clk_regmap_gate_data){
3387 .data = &(struct clk_regmap_gate_data){
3519 .data = &(struct clk_regmap_mux_data){
3522 .shift = 28,
3535 .data = &(struct clk_regmap_mux_data){
3538 .shift = 20,
3551 .data = &(struct clk_regmap_mux_data){
3554 .shift = 28,
3582 .data = &(struct clk_regmap_mux_data){
3585 .shift = 16,
3598 .data = &(struct clk_regmap_gate_data){
3614 .data = &(struct clk_regmap_gate_data){
3630 .data = &(struct clk_regmap_gate_data){
3646 .data = &(struct clk_regmap_gate_data){
3675 .data = &(struct clk_regmap_mux_data){
3678 .shift = 12,
3691 .data = &(struct clk_regmap_div_data){
3693 .shift = 0,
3708 .data = &(struct clk_regmap_gate_data){
3733 .data = &(struct clk_regmap_mux_data){
3736 .shift = 9,
3749 .data = &(struct clk_regmap_div_data){
3751 .shift = 0,
3764 .data = &(struct clk_regmap_gate_data){
3779 * muxed by a glitch-free switch. The CCF can manage this glitch-free
3780 * mux because it does top-to-bottom updates the each clock tree and
3795 .data = &(struct clk_regmap_mux_data){
3798 .shift = 9,
3816 .data = &(struct clk_regmap_div_data){
3818 .shift = 0,
3833 .data = &(struct clk_regmap_gate_data){
3849 .data = &(struct clk_regmap_mux_data){
3852 .shift = 25,
3870 .data = &(struct clk_regmap_div_data){
3872 .shift = 16,
3887 .data = &(struct clk_regmap_gate_data){
3908 .data = &(struct clk_regmap_mux_data){
3911 .shift = 31,
3923 .data = &(struct clk_regmap_div_data){
3925 .shift = 0,
3939 .data = &(struct clk_regmap_gate_data){
3965 .data = &(struct clk_regmap_mux_data){
3968 .shift = 7,
3979 .data = &(struct clk_regmap_div_data){
3981 .shift = 0,
3996 .data = &(struct clk_regmap_gate_data){
4012 .data = &(struct clk_regmap_mux_data){
4015 .shift = 23,
4026 .data = &(struct clk_regmap_div_data){
4028 .shift = 16,
4043 .data = &(struct clk_regmap_gate_data){
4072 .data = &(struct clk_regmap_mux_data){
4075 .shift = 9,
4086 .data = &(struct clk_regmap_div_data){
4088 .shift = 0,
4103 .data = &(struct clk_regmap_gate_data){
4119 .data = &(struct clk_regmap_mux_data){
4122 .shift = 25,
4133 .data = &(struct clk_regmap_div_data){
4135 .shift = 16,
4150 .data = &(struct clk_regmap_gate_data){
5278 struct device *dev = &pdev->dev; in meson_g12b_dvfs_setup()
5355 struct device *dev = &pdev->dev; in meson_g12a_dvfs_setup()
5395 eeclkc_data = of_device_get_match_data(&pdev->dev); in meson_g12a_probe()
5397 return -EINVAL; in meson_g12a_probe()
5406 if (g12a_data->dvfs_setup) in meson_g12a_probe()
5407 return g12a_data->dvfs_setup(pdev); in meson_g12a_probe()
5443 .compatible = "amlogic,g12a-clkc",
5444 .data = &g12a_clkc_data.eeclkc_data
5447 .compatible = "amlogic,g12b-clkc",
5448 .data = &g12b_clkc_data.eeclkc_data
5451 .compatible = "amlogic,sm1-clkc",
5452 .data = &sm1_clkc_data.eeclkc_data
5461 .name = "g12a-clkc",