Lines Matching +full:ext +full:- +full:26 +full:m

1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/jz4760-cgu.h>
45 0x0, 0x1, -1, 0x2, -1, -1, -1, 0x3,
61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 2; in jz4760_cgu_calc_m_n_od() local
67 n = clamp_val(n, 2, 1 << pll_info->n_bits); in jz4760_cgu_calc_m_n_od()
70 od = (unsigned int)-1; in jz4760_cgu_calc_m_n_od()
73 m = (rate / MHZ) * (1 << ++od) * n / (parent_rate / MHZ); in jz4760_cgu_calc_m_n_od()
74 } while ((m > m_max || m & 1) && (od < 4)); in jz4760_cgu_calc_m_n_od()
76 if (od < 4 && m >= 4 && m <= m_max) in jz4760_cgu_calc_m_n_od()
80 *pm = m; in jz4760_cgu_calc_m_n_od()
89 [JZ4760_CLK_EXT] = { "ext", CGU_CLK_EXT },
135 .bypass_bit = -1,
148 CGU_REG_CPCCR, 0, 1, 4, 22, -1, -1, 0,
156 CGU_REG_CPCCR, 4, 1, 4, 22, -1, -1, 0,
164 CGU_REG_CPCCR, 24, 1, 4, 22, -1, -1, 0,
172 CGU_REG_CPCCR, 16, 1, 4, 22, -1, -1, 0,
180 CGU_REG_CPCCR, 12, 1, 4, 22, -1, -1, 0,
188 CGU_REG_CPCCR, 8, 1, 4, 22, -1, -1, 0,
199 CGU_REG_CPCCR, 21, 1, 1, 22, -1, -1, 0,
210 .div = { CGU_REG_UHCCDR, 0, 1, 4, -1, -1, -1 },
217 .div = { CGU_REG_GPUCDR, 0, 1, 3, -1, -1, -1 },
224 .div = { CGU_REG_LPCDR, 0, 1, 11, -1, -1, -1 },
242 .div = { CGU_REG_GPSCDR, 0, 1, 4, -1, -1, -1 },
246 /* Those divided clocks can connect to EXT, PLL0 or PLL1 */
250 .parents = { JZ4760_CLK_EXT, -1,
253 .div = { CGU_REG_PCMCDR, 0, 1, 9, -1, -1, -1, BIT(0) },
258 .parents = { JZ4760_CLK_EXT, -1,
261 .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1, BIT(0) },
265 .parents = { JZ4760_CLK_EXT, -1,
268 .div = { CGU_REG_USBCDR, 0, 1, 8, -1, -1, -1 },
272 /* Those divided clocks can connect to EXT or PLL0 */
277 .div = { CGU_REG_MSCCDR, 0, 1, 6, -1, -1, -1, BIT(0) },
283 .div = { CGU_REG_SSICDR, 0, 1, 6, -1, -1, -1, BIT(0) },
290 .div = { CGU_REG_CIMCDR, 0, 1, 8, -1, -1, -1 },
291 .gate = { CGU_REG_CLKGR0, 26 },
294 /* Gate-only clocks */
394 "ext/512", CGU_CLK_FIXDIV,
425 CLK_OF_DECLARE_DRIVER(jz4760_cgu, "ingenic,jz4760-cgu", jz4760_cgu_init);
428 CLK_OF_DECLARE_DRIVER(jz4760b_cgu, "ingenic,jz4760b-cgu", jz4760_cgu_init);