Lines Matching refs:shift
79 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ argument
80 to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
88 #define imx_clk_divider(name, parent, reg, shift, width) \ argument
89 to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
91 #define imx_clk_divider2(name, parent, reg, shift, width) \ argument
92 to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width))
94 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \ argument
95 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
97 #define imx_clk_gate(name, parent, reg, shift) \ argument
98 to_clk(imx_clk_hw_gate(name, parent, reg, shift))
100 #define imx_clk_gate_dis(name, parent, reg, shift) \ argument
101 to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift))
103 #define imx_clk_gate2(name, parent, reg, shift) \ argument
104 to_clk(imx_clk_hw_gate2(name, parent, reg, shift))
106 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \ argument
107 to_clk(imx_clk_hw_gate2_flags(name, parent, reg, shift, flags))
109 #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \ argument
110 to_clk(imx_clk_hw_gate2_shared2(name, parent, reg, shift, share_count))
112 #define imx_clk_gate3(name, parent, reg, shift) \ argument
113 to_clk(imx_clk_hw_gate3(name, parent, reg, shift))
115 #define imx_clk_gate4(name, parent, reg, shift) \ argument
116 to_clk(imx_clk_hw_gate4(name, parent, reg, shift))
118 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
119 to_clk(imx_clk_hw_mux(name, reg, shift, width, parents, num_parents))
213 void __iomem *reg, u8 shift, u32 exclusive_mask);
222 void __iomem *reg, u8 shift, u8 width,
225 struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift,
236 void __iomem *reg, u8 shift, u8 width,
240 u8 shift, u8 width, const char * const *parents,
263 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_mux_ldb() argument
268 shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock); in imx_clk_hw_mux_ldb()
280 void __iomem *reg, u8 shift, in imx_clk_hw_divider() argument
284 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_divider()
289 void __iomem *reg, u8 shift, in imx_clk_hw_divider_flags() argument
293 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_divider_flags()
297 void __iomem *reg, u8 shift, u8 width) in imx_clk_hw_divider2() argument
301 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_divider2()
305 const char *parent, void __iomem *reg, u8 shift, u8 width, in imx_clk_divider2_flags() argument
310 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_divider2_flags()
314 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_hw_gate_flags() argument
317 shift, 0, &imx_ccm_lock); in imx_clk_hw_gate_flags()
321 void __iomem *reg, u8 shift) in imx_clk_hw_gate() argument
324 shift, 0, &imx_ccm_lock); in imx_clk_hw_gate()
328 const char *parent, void __iomem *reg, u8 shift) in imx_dev_clk_hw_gate() argument
331 shift, 0, &imx_ccm_lock); in imx_dev_clk_hw_gate()
335 void __iomem *reg, u8 shift) in imx_clk_hw_gate_dis() argument
338 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); in imx_clk_hw_gate_dis()
342 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_hw_gate_dis_flags() argument
345 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); in imx_clk_hw_gate_dis_flags()
349 void __iomem *reg, u8 shift) in imx_clk_hw_gate2() argument
352 shift, 0x3, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate2()
356 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_hw_gate2_flags() argument
359 shift, 0x3, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate2_flags()
363 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate2_shared() argument
367 shift, 0x3, 0x3, 0, &imx_ccm_lock, share_count); in imx_clk_hw_gate2_shared()
371 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate2_shared2() argument
375 CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0x3, 0, in imx_clk_hw_gate2_shared2()
381 void __iomem *reg, u8 shift, in imx_dev_clk_hw_gate_shared() argument
385 CLK_OPS_PARENT_ENABLE, reg, shift, 0x1, in imx_dev_clk_hw_gate_shared()
390 const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) in imx_clk_gate2_cgr() argument
393 shift, cgr_val, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_gate2_cgr()
397 void __iomem *reg, u8 shift) in imx_clk_hw_gate3() argument
401 reg, shift, 0, &imx_ccm_lock); in imx_clk_hw_gate3()
405 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate3_flags() argument
410 reg, shift, 0, &imx_ccm_lock); in imx_clk_hw_gate3_flags()
413 #define imx_clk_gate3_flags(name, parent, reg, shift, flags) \ argument
414 to_clk(imx_clk_hw_gate3_flags(name, parent, reg, shift, flags))
417 void __iomem *reg, u8 shift) in imx_clk_hw_gate4() argument
421 reg, shift, 0x3, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate4()
425 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate4_flags() argument
430 reg, shift, 0x3, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate4_flags()
433 #define imx_clk_gate4_flags(name, parent, reg, shift, flags) \ argument
434 to_clk(imx_clk_hw_gate4_flags(name, parent, reg, shift, flags))
437 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_mux() argument
441 CLK_SET_RATE_NO_REPARENT, reg, shift, in imx_clk_hw_mux()
446 const char *name, void __iomem *reg, u8 shift, in imx_dev_clk_hw_mux() argument
451 reg, shift, width, 0, &imx_ccm_lock); in imx_dev_clk_hw_mux()
455 u8 shift, u8 width, const char * const *parents, in imx_clk_mux2() argument
460 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_mux2()
464 u8 shift, u8 width, in imx_clk_hw_mux2() argument
471 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_mux2()
475 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux_flags() argument
480 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, in imx_clk_mux_flags()
485 void __iomem *reg, u8 shift, u8 width, in imx_clk_hw_mux2_flags() argument
491 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_mux2_flags()
495 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux2_flags() argument
501 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_mux2_flags()
505 void __iomem *reg, u8 shift, in imx_clk_hw_mux_flags() argument
513 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_mux_flags()
518 void __iomem *reg, u8 shift, in imx_dev_clk_hw_mux_flags() argument
526 reg, shift, width, 0, &imx_ccm_lock); in imx_dev_clk_hw_mux_flags()
598 unsigned long flags, void __iomem *reg, u8 shift, u8 width,