Lines Matching defs:name
65 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ argument
68 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ argument
73 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ argument
76 #define imx_clk_pfd(name, parent_name, reg, idx) \ argument
79 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ argument
82 #define imx_clk_fixed(name, rate) \ argument
85 #define imx_clk_fixed_factor(name, parent, mult, div) \ argument
88 #define imx_clk_divider(name, parent, reg, shift, width) \ argument
91 #define imx_clk_divider2(name, parent, reg, shift, width) \ argument
94 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \ argument
97 #define imx_clk_gate(name, parent, reg, shift) \ argument
100 #define imx_clk_gate_dis(name, parent, reg, shift) \ argument
103 #define imx_clk_gate2(name, parent, reg, shift) \ argument
106 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \ argument
109 #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \ argument
112 #define imx_clk_gate3(name, parent, reg, shift) \ argument
115 #define imx_clk_gate4(name, parent, reg, shift) \ argument
118 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
121 #define imx_clk_pllv1(type, name, parent, base) \ argument
124 #define imx_clk_pllv2(name, parent, base) \ argument
127 #define imx_clk_frac_pll(name, parent_name, base) \ argument
130 #define imx_clk_sscg_pll(name, parent_names, num_parents, parent,\ argument
138 #define imx_clk_pll14xx(name, parent_name, base, pll_clk) \ argument
250 static inline struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name, in imx_clk_hw_pll14xx()
257 static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate) in imx_clk_hw_fixed()
262 static inline struct clk_hw *imx_clk_hw_mux_ldb(const char *name, void __iomem *reg, in imx_clk_hw_mux_ldb()
271 static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name, in imx_clk_hw_fixed_factor()
278 static inline struct clk_hw *imx_clk_hw_divider(const char *name, in imx_clk_hw_divider()
287 static inline struct clk_hw *imx_clk_hw_divider_flags(const char *name, in imx_clk_hw_divider_flags()
296 static inline struct clk_hw *imx_clk_hw_divider2(const char *name, const char *parent, in imx_clk_hw_divider2()
304 static inline struct clk *imx_clk_divider2_flags(const char *name, in imx_clk_divider2_flags()
313 static inline struct clk_hw *imx_clk_hw_gate_flags(const char *name, const char *parent, in imx_clk_hw_gate_flags()
320 static inline struct clk_hw *imx_clk_hw_gate(const char *name, const char *parent, in imx_clk_hw_gate()
327 static inline struct clk_hw *imx_dev_clk_hw_gate(struct device *dev, const char *name, in imx_dev_clk_hw_gate()
334 static inline struct clk_hw *imx_clk_hw_gate_dis(const char *name, const char *parent, in imx_clk_hw_gate_dis()
341 static inline struct clk_hw *imx_clk_hw_gate_dis_flags(const char *name, const char *parent, in imx_clk_hw_gate_dis_flags()
348 static inline struct clk_hw *imx_clk_hw_gate2(const char *name, const char *parent, in imx_clk_hw_gate2()
355 static inline struct clk_hw *imx_clk_hw_gate2_flags(const char *name, const char *parent, in imx_clk_hw_gate2_flags()
362 static inline struct clk_hw *imx_clk_hw_gate2_shared(const char *name, in imx_clk_hw_gate2_shared()
370 static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name, in imx_clk_hw_gate2_shared2()
380 const char *name, const char *parent, in imx_dev_clk_hw_gate_shared()
389 static inline struct clk *imx_clk_gate2_cgr(const char *name, in imx_clk_gate2_cgr()
396 static inline struct clk_hw *imx_clk_hw_gate3(const char *name, const char *parent, in imx_clk_hw_gate3()
404 static inline struct clk_hw *imx_clk_hw_gate3_flags(const char *name, in imx_clk_hw_gate3_flags()
413 #define imx_clk_gate3_flags(name, parent, reg, shift, flags) \ argument
416 static inline struct clk_hw *imx_clk_hw_gate4(const char *name, const char *parent, in imx_clk_hw_gate4()
424 static inline struct clk_hw *imx_clk_hw_gate4_flags(const char *name, in imx_clk_hw_gate4_flags()
433 #define imx_clk_gate4_flags(name, parent, reg, shift, flags) \ argument
436 static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg, in imx_clk_hw_mux()
446 const char *name, void __iomem *reg, u8 shift, in imx_dev_clk_hw_mux()
454 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, in imx_clk_mux2()
463 static inline struct clk_hw *imx_clk_hw_mux2(const char *name, void __iomem *reg, in imx_clk_hw_mux2()
474 static inline struct clk *imx_clk_mux_flags(const char *name, in imx_clk_mux_flags()
484 static inline struct clk_hw *imx_clk_hw_mux2_flags(const char *name, in imx_clk_hw_mux2_flags()
494 static inline struct clk *imx_clk_mux2_flags(const char *name, in imx_clk_mux2_flags()
504 static inline struct clk_hw *imx_clk_hw_mux_flags(const char *name, in imx_clk_hw_mux_flags()
517 const char *name, in imx_dev_clk_hw_mux_flags()
544 #define imx8m_clk_hw_composite_bus(name, parent_names, reg) \ argument
550 #define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg) \ argument
555 #define imx8m_clk_hw_composite_core(name, parent_names, reg) \ argument
561 #define imx8m_clk_composite_flags(name, parent_names, num_parents, reg, \ argument
566 #define __imx8m_clk_hw_composite(name, parent_names, reg, flags) \ argument
571 #define __imx8m_clk_hw_fw_managed_composite(name, parent_names, reg, flags) \ argument
576 #define imx8m_clk_hw_fw_managed_composite(name, parent_names, reg) \ argument
579 #define imx8m_clk_hw_fw_managed_composite_critical(name, parent_names, reg) \ argument
582 #define __imx8m_clk_composite(name, parent_names, reg, flags) \ argument
585 #define imx8m_clk_hw_composite(name, parent_names, reg) \ argument
588 #define imx8m_clk_composite(name, parent_names, reg) \ argument
591 #define imx8m_clk_hw_composite_critical(name, parent_names, reg) \ argument
594 #define imx8m_clk_composite_critical(name, parent_names, reg) \ argument