Lines Matching +full:pd +full:- +full:node

1 // SPDX-License-Identifier: GPL-2.0
9 * Murali Karicheri <m-karicheri2@ti.com>
12 * And: arch/arm/mach-davinci/psc.c
16 #include <linux/clk-provider.h>
28 #include <linux/reset-controller.h>
66 * struct davinci_lpsc_clk - LPSC clock structure
73 * @pd: Power domain
83 u32 pd; member
91 * best_dev_name - get the "best" device name.
94 * Returns the device tree compatible name if the device has a DT node,
103 if (!of_property_read_string(dev->of_node, "compatible", &compatible)) in best_dev_name()
114 regmap_write_bits(lpsc->regmap, MDCTL(lpsc->md), MDSTAT_STATE_MASK, in davinci_lpsc_config()
117 if (lpsc->flags & LPSC_FORCE) in davinci_lpsc_config()
118 regmap_write_bits(lpsc->regmap, MDCTL(lpsc->md), MDCTL_FORCE, in davinci_lpsc_config()
121 regmap_read(lpsc->regmap, PDSTAT(lpsc->pd), &pdstat); in davinci_lpsc_config()
123 regmap_write_bits(lpsc->regmap, PDCTL(lpsc->pd), PDCTL_NEXT, in davinci_lpsc_config()
126 regmap_write(lpsc->regmap, PTCMD, BIT(lpsc->pd)); in davinci_lpsc_config()
128 regmap_read_poll_timeout(lpsc->regmap, EPCPR, epcpr, in davinci_lpsc_config()
129 epcpr & BIT(lpsc->pd), 0, 0); in davinci_lpsc_config()
131 regmap_write_bits(lpsc->regmap, PDCTL(lpsc->pd), PDCTL_EPCGOOD, in davinci_lpsc_config()
134 regmap_write(lpsc->regmap, PTCMD, BIT(lpsc->pd)); in davinci_lpsc_config()
137 regmap_read_poll_timeout(lpsc->regmap, PTSTAT, ptstat, in davinci_lpsc_config()
138 !(ptstat & BIT(lpsc->pd)), 0, 0); in davinci_lpsc_config()
140 regmap_read_poll_timeout(lpsc->regmap, MDSTAT(lpsc->md), mdstat, in davinci_lpsc_config()
166 regmap_read(lpsc->regmap, MDSTAT(lpsc->md), &mdstat); in davinci_lpsc_clk_is_enabled()
186 * to get the clock instead of using lpsc->hw.clk directly. in davinci_psc_genpd_attach_dev()
188 clk = clk_get_sys(best_dev_name(lpsc->dev), clk_hw_get_name(&lpsc->hw)); in davinci_psc_genpd_attach_dev()
200 lpsc->genpd_clk = clk; in davinci_psc_genpd_attach_dev()
217 pm_clk_remove_clk(dev, lpsc->genpd_clk); in davinci_psc_genpd_detach_dev()
220 lpsc->genpd_clk = NULL; in davinci_psc_genpd_detach_dev()
224 * davinci_lpsc_clk_register - register LPSC clock
230 * @pd: power domain
236 u32 md, u32 pd, u32 flags) in davinci_lpsc_clk_register() argument
245 return ERR_PTR(-ENOMEM); in davinci_lpsc_clk_register()
259 lpsc->dev = dev; in davinci_lpsc_clk_register()
260 lpsc->regmap = regmap; in davinci_lpsc_clk_register()
261 lpsc->hw.init = &init; in davinci_lpsc_clk_register()
262 lpsc->md = md; in davinci_lpsc_clk_register()
263 lpsc->pd = pd; in davinci_lpsc_clk_register()
264 lpsc->flags = flags; in davinci_lpsc_clk_register()
266 ret = clk_hw_register(dev, &lpsc->hw); in davinci_lpsc_clk_register()
272 /* for now, genpd is only registered when using device-tree */ in davinci_lpsc_clk_register()
273 if (!dev || !dev->of_node) in davinci_lpsc_clk_register()
277 ret = clk_hw_register_clkdev(&lpsc->hw, name, best_dev_name(dev)); in davinci_lpsc_clk_register()
279 lpsc->pm_domain.name = devm_kasprintf(dev, GFP_KERNEL, "%s: %s", in davinci_lpsc_clk_register()
281 lpsc->pm_domain.attach_dev = davinci_psc_genpd_attach_dev; in davinci_lpsc_clk_register()
282 lpsc->pm_domain.detach_dev = davinci_psc_genpd_detach_dev; in davinci_lpsc_clk_register()
283 lpsc->pm_domain.flags = GENPD_FLAG_PM_CLK; in davinci_lpsc_clk_register()
285 is_on = davinci_lpsc_clk_is_enabled(&lpsc->hw); in davinci_lpsc_clk_register()
286 pm_genpd_init(&lpsc->pm_domain, NULL, is_on); in davinci_lpsc_clk_register()
298 return -EINVAL; in davinci_lpsc_clk_reset()
301 regmap_write_bits(lpsc->regmap, MDCTL(lpsc->md), MDCTL_LRESET, mdctl); in davinci_lpsc_clk_reset()
310 struct clk *clk = psc->clk_data.clks[id]; in davinci_psc_reset_assert()
319 struct clk *clk = psc->clk_data.clks[id]; in davinci_psc_reset_deassert()
337 /* the clock node is the same as the reset node */ in davinci_psc_reset_of_xlate()
347 if (!(lpsc->flags & LPSC_LOCAL_RESET)) in davinci_psc_reset_of_xlate()
348 return -EINVAL; in davinci_psc_reset_of_xlate()
350 return lpsc->md; in davinci_psc_reset_of_xlate()
373 return ERR_PTR(-ENOMEM); in __davinci_psc_register_clocks()
377 ret = -ENOMEM; in __davinci_psc_register_clocks()
381 psc->clk_data.clks = clks; in __davinci_psc_register_clocks()
382 psc->clk_data.clk_num = num_clks; in __davinci_psc_register_clocks()
389 clks[i] = ERR_PTR(-ENOENT); in __davinci_psc_register_clocks()
393 ret = -ENOMEM; in __davinci_psc_register_clocks()
397 psc->pm_data.domains = pm_domains; in __davinci_psc_register_clocks()
398 psc->pm_data.num_domains = num_clks; in __davinci_psc_register_clocks()
406 for (; info->name; info++) { in __davinci_psc_register_clocks()
409 lpsc = davinci_lpsc_clk_register(dev, info->name, info->parent, in __davinci_psc_register_clocks()
410 regmap, info->md, info->pd, in __davinci_psc_register_clocks()
411 info->flags); in __davinci_psc_register_clocks()
414 info->name, PTR_ERR(lpsc)); in __davinci_psc_register_clocks()
418 clks[info->md] = lpsc->hw.clk; in __davinci_psc_register_clocks()
419 pm_domains[info->md] = &lpsc->pm_domain; in __davinci_psc_register_clocks()
429 psc->rcdev.ops = &davinci_psc_reset_ops; in __davinci_psc_register_clocks()
430 psc->rcdev.owner = THIS_MODULE; in __davinci_psc_register_clocks()
431 psc->rcdev.dev = dev; in __davinci_psc_register_clocks()
432 psc->rcdev.of_node = dev->of_node; in __davinci_psc_register_clocks()
433 psc->rcdev.of_reset_n_cells = 1; in __davinci_psc_register_clocks()
434 psc->rcdev.of_xlate = davinci_psc_reset_of_xlate; in __davinci_psc_register_clocks()
435 psc->rcdev.nr_resets = num_clks; in __davinci_psc_register_clocks()
437 ret = devm_reset_controller_register(dev, &psc->rcdev); in __davinci_psc_register_clocks()
464 for (; info->name; info++) { in davinci_psc_register_clocks()
465 const struct davinci_lpsc_clkdev_info *cdevs = info->cdevs; in davinci_psc_register_clocks()
466 struct clk *clk = psc->clk_data.clks[info->md]; in davinci_psc_register_clocks()
471 for (; cdevs->con_id || cdevs->dev_id; cdevs++) in davinci_psc_register_clocks()
472 clk_register_clkdev(clk, cdevs->con_id, cdevs->dev_id); in davinci_psc_register_clocks()
483 struct device_node *node = dev->of_node; in of_davinci_psc_clk_init() local
490 of_genpd_add_provider_onecell(node, &psc->pm_data); in of_davinci_psc_clk_init()
492 of_clk_add_provider(node, of_clk_src_onecell_get, &psc->clk_data); in of_davinci_psc_clk_init()
499 { .compatible = "ti,da850-psc0", .data = &of_da850_psc0_init_data },
500 { .compatible = "ti,da850-psc1", .data = &of_da850_psc1_init_data },
507 { .name = "da830-psc0", .driver_data = (kernel_ulong_t)&da830_psc0_init_data },
508 { .name = "da830-psc1", .driver_data = (kernel_ulong_t)&da830_psc1_init_data },
511 { .name = "da850-psc0", .driver_data = (kernel_ulong_t)&da850_psc0_init_data },
512 { .name = "da850-psc1", .driver_data = (kernel_ulong_t)&da850_psc1_init_data },
515 { .name = "dm355-psc", .driver_data = (kernel_ulong_t)&dm355_psc_init_data },
518 { .name = "dm365-psc", .driver_data = (kernel_ulong_t)&dm365_psc_init_data },
521 { .name = "dm644x-psc", .driver_data = (kernel_ulong_t)&dm644x_psc_init_data },
524 { .name = "dm646x-psc", .driver_data = (kernel_ulong_t)&dm646x_psc_init_data },
531 struct device *dev = &pdev->dev; in davinci_psc_probe()
539 init_data = of_id->data; in davinci_psc_probe()
540 else if (pdev->id_entry) in davinci_psc_probe()
541 init_data = (void *)pdev->id_entry->driver_data; in davinci_psc_probe()
545 return -EINVAL; in davinci_psc_probe()
552 ret = devm_clk_bulk_get(dev, init_data->num_parent_clks, in davinci_psc_probe()
553 init_data->parent_clks); in davinci_psc_probe()
557 return init_data->psc_init(dev, base); in davinci_psc_probe()
563 .name = "davinci-psc-clk",