Lines Matching +full:protected +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
113 if (!core->rpm_enabled)
116 ret = pm_runtime_get_sync(core->dev);
118 pm_runtime_put_noidle(core->dev);
126 if (!core->rpm_enabled)
129 pm_runtime_put_sync(core->dev);
153 if (--prepare_refcnt)
193 if (--enable_refcnt) {
203 return core->protect_count;
211 * .is_prepared is optional for clocks that can prepare
214 if (!core->ops->is_prepared)
215 return core->prepare_count;
218 ret = core->ops->is_prepared(core->hw);
230 * .is_enabled is only mandatory for clocks that gate
233 if (!core->ops->is_enabled)
234 return core->enable_count;
246 if (core->rpm_enabled) {
247 pm_runtime_get_noresume(core->dev);
248 if (!pm_runtime_active(core->dev)) {
254 ret = core->ops->is_enabled(core->hw);
256 if (core->rpm_enabled)
257 pm_runtime_put(core->dev);
266 return !clk ? NULL : clk->core->name;
272 return hw->core->name;
278 return !clk ? NULL : clk->core->hw;
284 return hw->core->num_parents;
290 return hw->core->parent ? hw->core->parent->hw : NULL;
300 if (!strcmp(core->name, name))
303 hlist_for_each_entry(child, &core->children, child_node) {
347 return -ENOENT;
352 return ERR_PTR(-ENOENT);
357 * clk_core_get - Find the clk_core parent of a clk
364 * node's 'clock-names' property or as the 'con_id' matching the device's
369 * clock-controller@c001 that has a clk_init_data::parent_data array
371 * clock-controller@f00abcd without needing to get the globally unique name of
374 * parent: clock-controller@f00abcd {
376 * #clock-cells = <0>;
379 * clock-controller@c001 {
381 * clocks = <&parent>;
382 * clock-names = "xtal";
383 * #clock-cells = <1>;
386 * Returns: -ENOENT when the provider can't be found or the clk doesn't
394 const char *name = core->parents[p_index].fw_name;
395 int index = core->parents[p_index].index;
396 struct clk_hw *hw = ERR_PTR(-ENOENT);
397 struct device *dev = core->dev;
399 struct device_node *np = core->of_node;
417 return hw->core;
422 struct clk_parent_map *entry = &core->parents[index];
425 if (entry->hw) {
426 parent = entry->hw->core;
433 parent = ERR_PTR(-EPROBE_DEFER);
436 if (PTR_ERR(parent) == -ENOENT && entry->name)
437 parent = clk_core_lookup(entry->name);
442 entry->core = parent;
448 if (!core || index >= core->num_parents || !core->parents)
451 if (!core->parents[index].core)
454 return core->parents[index].core;
462 parent = clk_core_get_parent_by_index(hw->core, index);
464 return !parent ? NULL : parent->hw;
470 return !clk ? 0 : clk->core->enable_count;
478 if (!core->num_parents || core->parent)
479 return core->rate;
491 return clk_core_get_rate_nolock(hw->core);
500 return core->accuracy;
505 return hw->core->flags;
511 return clk_core_is_prepared(hw->core);
517 return clk_core_rate_is_protected(hw->core);
523 return clk_core_is_enabled(hw->core);
532 return clk_core_is_enabled(clk->core);
540 return abs(now - rate) < abs(best - rate);
549 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
555 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
556 parent = core->parent;
557 if (core->flags & CLK_SET_RATE_PARENT) {
558 ret = __clk_determine_rate(parent ? parent->hw : NULL,
574 num_parents = core->num_parents;
580 if (core->flags & CLK_SET_RATE_PARENT) {
582 ret = __clk_determine_rate(parent->hw, &parent_req);
589 if (mux_is_better_rate(req->rate, parent_req.rate,
597 return -EINVAL;
601 req->best_parent_hw = best_parent->hw;
602 req->best_parent_rate = best;
603 req->rate = best;
613 return !core ? NULL : core->hw->clk;
624 *min_rate = core->min_rate;
625 *max_rate = core->max_rate;
627 hlist_for_each_entry(clk_user, &core->clks, clks_node)
628 *min_rate = max(*min_rate, clk_user->min_rate);
630 hlist_for_each_entry(clk_user, &core->clks, clks_node)
631 *max_rate = min(*max_rate, clk_user->max_rate);
637 hw->core->min_rate = min_rate;
638 hw->core->max_rate = max_rate;
643 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
651 * Returns: 0 on success, -EERROR value on error
676 if (WARN(core->protect_count == 0,
677 "%s already unprotected\n", core->name))
680 if (--core->protect_count > 0)
683 clk_core_rate_unprotect(core->parent);
693 return -EINVAL;
695 if (core->protect_count == 0)
698 ret = core->protect_count;
699 core->protect_count = 1;
706 * clk_rate_exclusive_put - release exclusivity over clock rate control
711 * clock which could result in a rate change or rate glitch. Exclusive clocks
713 * further up the parent chain of clocks. As a result, clocks up parent chain
734 if (WARN_ON(clk->exclusive_count <= 0))
737 clk_core_rate_unprotect(clk->core);
738 clk->exclusive_count--;
751 if (core->protect_count == 0)
752 clk_core_rate_protect(core->parent);
754 core->protect_count++;
768 core->protect_count = count;
772 * clk_rate_exclusive_get - get exclusivity over the clk rate control
777 * clock which could result in a rate change or rate glitch. Exclusive clocks
779 * further up the parent chain of clocks. As a result, clocks up parent chain
787 * Returns 0 on success, -EERROR otherwise
795 clk_core_rate_protect(clk->core);
796 clk->exclusive_count++;
810 if (WARN(core->prepare_count == 0,
811 "%s already unprepared\n", core->name))
814 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
815 "Unpreparing critical %s\n", core->name))
818 if (core->flags & CLK_SET_RATE_GATE)
821 if (--core->prepare_count > 0)
824 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
828 if (core->ops->unprepare)
829 core->ops->unprepare(core->hw);
834 clk_core_unprepare(core->parent);
845 * clk_unprepare - undo preparation of a clock source
860 clk_core_unprepare_lock(clk->core);
873 if (core->prepare_count == 0) {
878 ret = clk_core_prepare(core->parent);
884 if (core->ops->prepare)
885 ret = core->ops->prepare(core->hw);
893 core->prepare_count++;
902 if (core->flags & CLK_SET_RATE_GATE)
907 clk_core_unprepare(core->parent);
925 * clk_prepare - prepare a clock source
934 * Returns 0 on success, -EERROR otherwise.
941 return clk_core_prepare_lock(clk->core);
952 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
955 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
956 "Disabling critical %s\n", core->name))
959 if (--core->enable_count > 0)
964 if (core->ops->disable)
965 core->ops->disable(core->hw);
969 clk_core_disable(core->parent);
982 * clk_disable - gate a clock
988 * SoC-internal clk which is controlled via simple register writes. In the
998 clk_core_disable_lock(clk->core);
1011 if (WARN(core->prepare_count == 0,
1012 "Enabling unprepared %s\n", core->name))
1013 return -ESHUTDOWN;
1015 if (core->enable_count == 0) {
1016 ret = clk_core_enable(core->parent);
1023 if (core->ops->enable)
1024 ret = core->ops->enable(core->hw);
1029 clk_core_disable(core->parent);
1034 core->enable_count++;
1051 * clk_gate_restore_context - restore context for poweroff
1055 * the gate clocks based on the enable_count. This is done in cases
1058 * helps restore the state of gate clocks.
1062 struct clk_core *core = hw->core;
1064 if (core->enable_count)
1065 core->ops->enable(hw);
1067 core->ops->disable(hw);
1076 hlist_for_each_entry(child, &core->children, child_node) {
1082 if (core->ops && core->ops->save_context)
1083 ret = core->ops->save_context(core->hw);
1092 if (core->ops && core->ops->restore_context)
1093 core->ops->restore_context(core->hw);
1095 hlist_for_each_entry(child, &core->children, child_node)
1100 * clk_save_context - save clock context for poweroff
1128 * clk_restore_context - restore clock context after poweroff
1146 * clk_enable - ungate a clock
1151 * if the operation will never sleep. One example is a SoC-internal clk which
1155 * must be called before clk_enable. Returns 0 on success, -EERROR
1163 return clk_core_enable_lock(clk->core);
1168 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1172 * making clk_enable()/clk_disable() no-ops, false otherwise.
1184 return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1215 hlist_for_each_entry(child, &core->children, child_node)
1218 if (core->prepare_count)
1221 if (core->flags & CLK_IGNORE_UNUSED)
1229 if (core->ops->unprepare_unused)
1230 core->ops->unprepare_unused(core->hw);
1231 else if (core->ops->unprepare)
1232 core->ops->unprepare(core->hw);
1246 hlist_for_each_entry(child, &core->children, child_node)
1249 if (core->flags & CLK_OPS_PARENT_ENABLE)
1250 clk_core_prepare_enable(core->parent);
1257 if (core->enable_count)
1260 if (core->flags & CLK_IGNORE_UNUSED)
1264 * some gate clocks have special needs during the disable-unused
1270 if (core->ops->disable_unused)
1271 core->ops->disable_unused(core->hw);
1272 else if (core->ops->disable)
1273 core->ops->disable(core->hw);
1281 if (core->flags & CLK_OPS_PARENT_ENABLE)
1282 clk_core_disable_unprepare(core->parent);
1298 pr_warn("clk: Not disabling unused clocks\n");
1334 * - if the provider is not protected at all
1335 * - if the calling consumer is the only one which has exclusivity
1339 req->rate = core->rate;
1340 } else if (core->ops->determine_rate) {
1341 return core->ops->determine_rate(core->hw, req);
1342 } else if (core->ops->round_rate) {
1343 rate = core->ops->round_rate(core->hw, req->rate,
1344 &req->best_parent_rate);
1348 req->rate = rate;
1350 return -EINVAL;
1364 parent = core->parent;
1366 req->best_parent_hw = parent->hw;
1367 req->best_parent_rate = parent->rate;
1369 req->best_parent_hw = NULL;
1370 req->best_parent_rate = 0;
1376 return core->ops->determine_rate || core->ops->round_rate;
1385 req->rate = 0;
1393 else if (core->flags & CLK_SET_RATE_PARENT)
1394 return clk_core_round_rate_nolock(core->parent, req);
1396 req->rate = core->rate;
1401 * __clk_determine_rate - get the closest rate actually supported by a clock
1410 req->rate = 0;
1414 return clk_core_round_rate_nolock(hw->core, req);
1419 * clk_hw_round_rate() - round the given rate for a hw clk
1438 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1441 ret = clk_core_round_rate_nolock(hw->core, &req);
1450 * clk_round_rate - round the given rate for a clk
1468 if (clk->exclusive_count)
1469 clk_core_rate_unprotect(clk->core);
1471 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1474 ret = clk_core_round_rate_nolock(clk->core, &req);
1476 if (clk->exclusive_count)
1477 clk_core_rate_protect(clk->core);
1489 * __clk_notify - call clk notifier chain
1495 * Triggers a notifier call chain on the clk rate-change notification
1513 if (cn->clk->core == core) {
1514 cnd.clk = cn->clk;
1515 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1541 if (core->parent)
1542 parent_accuracy = core->parent->accuracy;
1544 if (core->ops->recalc_accuracy)
1545 core->accuracy = core->ops->recalc_accuracy(core->hw,
1548 core->accuracy = parent_accuracy;
1550 hlist_for_each_entry(child, &core->children, child_node)
1556 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1563 * clk_get_accuracy - return the accuracy of clk
1579 accuracy = clk_core_get_accuracy_recalc(clk->core);
1591 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1592 rate = core->ops->recalc_rate(core->hw, parent_rate);
1618 old_rate = core->rate;
1620 if (core->parent)
1621 parent_rate = core->parent->rate;
1623 core->rate = clk_recalc(core, parent_rate);
1629 if (core->notifier_count && msg)
1630 __clk_notify(core, msg, old_rate, core->rate);
1632 hlist_for_each_entry(child, &core->children, child_node)
1638 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1645 * clk_get_rate - return the rate of clk
1660 rate = clk_core_get_rate_recalc(clk->core);
1673 return -EINVAL;
1675 for (i = 0; i < core->num_parents; i++) {
1677 if (core->parents[i].core == parent)
1681 if (core->parents[i].core)
1685 if (core->parents[i].hw) {
1686 if (core->parents[i].hw == parent->hw)
1698 if (core->parents[i].name &&
1699 !strcmp(parent->name, core->parents[i].name))
1703 if (i == core->num_parents)
1704 return -EINVAL;
1706 core->parents[i].core = parent;
1711 * clk_hw_get_parent_index - return the index of the parent clock
1714 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1722 return -EINVAL;
1724 return clk_fetch_parent_index(hw->core, parent->core);
1735 core->orphan = is_orphan;
1737 hlist_for_each_entry(child, &core->children, child_node)
1743 bool was_orphan = core->orphan;
1745 hlist_del(&core->child_node);
1748 bool becomes_orphan = new_parent->orphan;
1751 if (new_parent->new_child == core)
1752 new_parent->new_child = NULL;
1754 hlist_add_head(&core->child_node, &new_parent->children);
1759 hlist_add_head(&core->child_node, &clk_orphan_list);
1764 core->parent = new_parent;
1771 struct clk_core *old_parent = core->parent;
1794 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1800 if (core->prepare_count) {
1821 if (core->prepare_count) {
1826 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1827 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1845 if (parent && core->ops->set_parent)
1846 ret = core->ops->set_parent(core->hw, p_index);
1873 * pre-rate change notifications and returns early if no clks in the
1890 if (core->notifier_count)
1891 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1895 __func__, core->name, ret);
1899 hlist_for_each_entry(child, &core->children, child_node) {
1914 core->new_rate = new_rate;
1915 core->new_parent = new_parent;
1916 core->new_parent_index = p_index;
1918 core->new_child = NULL;
1919 if (new_parent && new_parent != core->parent)
1920 new_parent->new_child = core;
1922 hlist_for_each_entry(child, &core->children, child_node) {
1923 child->new_rate = clk_recalc(child, new_rate);
1924 clk_calc_subtree(child, child->new_rate, NULL, 0);
1949 parent = old_parent = core->parent;
1951 best_parent_rate = parent->rate;
1971 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1975 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1976 /* pass-through clock without adjustable parent */
1977 core->new_rate = core->rate;
1980 /* pass-through clock with adjustable parent */
1982 new_rate = parent->new_rate;
1986 /* some clocks must be gated to change parent */
1988 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1990 __func__, core->name);
1995 if (parent && core->num_parents > 1) {
1999 __func__, parent->name, core->name);
2004 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2005 best_parent_rate != parent->rate)
2025 if (core->rate == core->new_rate)
2028 if (core->notifier_count) {
2029 ret = __clk_notify(core, event, core->rate, core->new_rate);
2034 hlist_for_each_entry(child, &core->children, child_node) {
2036 if (child->new_parent && child->new_parent != core)
2043 /* handle the new child who might not be in core->children yet */
2044 if (core->new_child) {
2045 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2067 old_rate = core->rate;
2069 if (core->new_parent) {
2070 parent = core->new_parent;
2071 best_parent_rate = core->new_parent->rate;
2072 } else if (core->parent) {
2073 parent = core->parent;
2074 best_parent_rate = core->parent->rate;
2080 if (core->flags & CLK_SET_RATE_UNGATE) {
2085 if (core->new_parent && core->new_parent != core->parent) {
2086 old_parent = __clk_set_parent_before(core, core->new_parent);
2087 trace_clk_set_parent(core, core->new_parent);
2089 if (core->ops->set_rate_and_parent) {
2091 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2093 core->new_parent_index);
2094 } else if (core->ops->set_parent) {
2095 core->ops->set_parent(core->hw, core->new_parent_index);
2098 trace_clk_set_parent_complete(core, core->new_parent);
2099 __clk_set_parent_after(core, core->new_parent, old_parent);
2102 if (core->flags & CLK_OPS_PARENT_ENABLE)
2105 trace_clk_set_rate(core, core->new_rate);
2107 if (!skip_set_rate && core->ops->set_rate)
2108 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2110 trace_clk_set_rate_complete(core, core->new_rate);
2112 core->rate = clk_recalc(core, best_parent_rate);
2114 if (core->flags & CLK_SET_RATE_UNGATE) {
2119 if (core->flags & CLK_OPS_PARENT_ENABLE)
2122 if (core->notifier_count && old_rate != core->rate)
2123 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2125 if (core->flags & CLK_RECALC_NEW_RATES)
2126 (void)clk_calc_new_rates(core, core->new_rate);
2132 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2134 if (child->new_parent && child->new_parent != core)
2139 /* handle the new child who might not be in core->children yet */
2140 if (core->new_child)
2141 clk_change_rate(core->new_child);
2189 /* fail on a direct rate set of a protected provider */
2191 return -EBUSY;
2196 return -EINVAL;
2206 fail_clk->name);
2208 ret = -EBUSY;
2215 core->req_rate = req_rate;
2223 * clk_set_rate - specify a new rate for clk
2239 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2241 * Returns 0 on success, -EERROR otherwise.
2253 if (clk->exclusive_count)
2254 clk_core_rate_unprotect(clk->core);
2256 ret = clk_core_set_rate_nolock(clk->core, rate);
2258 if (clk->exclusive_count)
2259 clk_core_rate_protect(clk->core);
2268 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2284 * Returns 0 on success, -EERROR otherwise.
2302 ret = clk_core_set_rate_nolock(clk->core, rate);
2304 clk_core_rate_protect(clk->core);
2305 clk->exclusive_count++;
2315 * clk_set_rate_range - set a rate range for a clock source
2330 trace_clk_set_rate_range(clk->core, min, max);
2334 __func__, clk->core->name, clk->dev_id, clk->con_id,
2336 return -EINVAL;
2341 if (clk->exclusive_count)
2342 clk_core_rate_unprotect(clk->core);
2345 old_min = clk->min_rate;
2346 old_max = clk->max_rate;
2347 clk->min_rate = min;
2348 clk->max_rate = max;
2350 rate = clk_core_get_rate_nolock(clk->core);
2357 * usual reason (clock broken, clock protected, etc) but also
2359 * - round_rate() was not favorable and fell on the wrong
2361 * - the determine_rate() callback does not really check for
2370 ret = clk_core_set_rate_nolock(clk->core, rate);
2373 clk->min_rate = old_min;
2374 clk->max_rate = old_max;
2378 if (clk->exclusive_count)
2379 clk_core_rate_protect(clk->core);
2388 * clk_set_min_rate - set a minimum clock rate for a clock source
2399 trace_clk_set_min_rate(clk->core, rate);
2401 return clk_set_rate_range(clk, rate, clk->max_rate);
2406 * clk_set_max_rate - set a maximum clock rate for a clock source
2417 trace_clk_set_max_rate(clk->core, rate);
2419 return clk_set_rate_range(clk, clk->min_rate, rate);
2424 * clk_get_parent - return the parent of a clk
2427 * Simply returns clk->parent. Returns NULL if clk is NULL.
2437 /* TODO: Create a per-user clk and change callers to call clk_put */
2438 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2449 if (core->num_parents > 1 && core->ops->get_parent)
2450 index = core->ops->get_parent(core->hw);
2468 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2472 * clk_has_parent - check if a clock is a possible parent for another
2486 /* NULL clocks should be nops, so return success if either is NULL. */
2490 core = clk->core;
2491 parent_core = parent->core;
2494 if (core->parent == parent_core)
2497 for (i = 0; i < core->num_parents; i++)
2498 if (!strcmp(core->parents[i].name, parent_core->name))
2517 if (core->parent == parent)
2520 /* verify ops for multi-parent clks */
2521 if (core->num_parents > 1 && !core->ops->set_parent)
2522 return -EPERM;
2524 /* check that we are allowed to re-parent if the clock is in use */
2525 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2526 return -EBUSY;
2529 return -EBUSY;
2536 __func__, parent->name, core->name);
2539 p_rate = parent->rate;
2553 /* do the re-parent */
2572 return clk_core_set_parent_nolock(hw->core, parent->core);
2577 * clk_set_parent - switch the parent of a mux clk
2581 * Re-parent clk to use parent as its new input source. If clk is in
2591 * Returns 0 on success, -EERROR otherwise.
2602 if (clk->exclusive_count)
2603 clk_core_rate_unprotect(clk->core);
2605 ret = clk_core_set_parent_nolock(clk->core,
2606 parent ? parent->core : NULL);
2608 if (clk->exclusive_count)
2609 clk_core_rate_protect(clk->core);
2619 int ret = -EINVAL;
2627 return -EBUSY;
2631 if (core->ops->set_phase) {
2632 ret = core->ops->set_phase(core->hw, degrees);
2634 core->phase = degrees;
2643 * clk_set_phase - adjust the phase shift of a clock signal
2648 * degrees. Returns 0 on success, -EERROR otherwise.
2652 * phase locked-loop clock signal generators we may shift phase with
2676 if (clk->exclusive_count)
2677 clk_core_rate_unprotect(clk->core);
2679 ret = clk_core_set_phase_nolock(clk->core, degrees);
2681 if (clk->exclusive_count)
2682 clk_core_rate_protect(clk->core);
2695 if (!core->ops->get_phase)
2699 ret = core->ops->get_phase(core->hw);
2701 core->phase = ret;
2707 * clk_get_phase - return the phase shift of a clock signal
2711 * -EERROR.
2721 ret = clk_core_get_phase(clk->core);
2731 core->duty.num = 1;
2732 core->duty.den = 2;
2739 struct clk_duty *duty = &core->duty;
2742 if (!core->ops->get_duty_cycle)
2745 ret = core->ops->get_duty_cycle(core->hw, duty);
2750 if (duty->den == 0 || duty->num > duty->den) {
2751 ret = -EINVAL;
2766 if (core->parent &&
2767 core->flags & CLK_DUTY_CYCLE_PARENT) {
2768 ret = clk_core_update_duty_cycle_nolock(core->parent);
2769 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2788 return -EBUSY;
2792 if (!core->ops->set_duty_cycle)
2795 ret = core->ops->set_duty_cycle(core->hw, duty);
2797 memcpy(&core->duty, duty, sizeof(*duty));
2809 if (core->parent &&
2810 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2811 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2812 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2819 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2839 return -EINVAL;
2846 if (clk->exclusive_count)
2847 clk_core_rate_unprotect(clk->core);
2849 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2851 if (clk->exclusive_count)
2852 clk_core_rate_protect(clk->core);
2863 struct clk_duty *duty = &core->duty;
2870 ret = mult_frac(scale, duty->num, duty->den);
2878 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2890 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2895 * clk_is_match - check if two clk's point to the same hardware clock
2911 /* true if clk->core pointers match. Avoid dereferencing garbage */
2913 if (p->core == q->core)
2940 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
2942 30 - level * 3, c->name,
2943 c->enable_count, c->prepare_count, c->protect_count,
2951 seq_puts(s, "-----");
2955 if (c->ops->is_enabled)
2957 else if (!c->ops->enable)
2970 hlist_for_each_entry(child, &c->children, child_node)
2977 struct hlist_head **lists = (struct hlist_head **)s->private;
2981 seq_puts(s, "-------------------------------------------------------------------------------------------------------\n");
3003 seq_printf(s, "\"%s\": { ", c->name);
3004 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3005 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
3006 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
3024 hlist_for_each_entry(child, &c->children, child_node) {
3036 struct hlist_head **lists = (struct hlist_head **)s->private;
3084 ret = clk_prepare_enable(core->hw->clk);
3086 clk_disable_unprepare(core->hw->clk);
3095 *val = core->enable_count && core->prepare_count;
3111 *val = core->rate;
3139 struct clk_core *core = s->private;
3140 unsigned long flags = core->flags;
3169 * 4. Fetch parent clock's clock-output-name if DT index was set
3177 seq_puts(s, parent->name);
3178 else if (core->parents[i].name)
3179 seq_puts(s, core->parents[i].name);
3180 else if (core->parents[i].fw_name)
3181 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3182 else if (core->parents[i].index >= 0)
3184 of_clk_get_parent_name(core->of_node,
3185 core->parents[i].index));
3194 struct clk_core *core = s->private;
3197 for (i = 0; i < core->num_parents - 1; i++)
3208 struct clk_core *core = s->private;
3210 if (core->parent)
3211 seq_printf(s, "%s\n", core->parent->name);
3219 struct clk_core *core = s->private;
3220 struct clk_duty *duty = &core->duty;
3222 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3230 struct clk_core *core = s->private;
3244 struct clk_core *core = s->private;
3263 root = debugfs_create_dir(core->name, pdentry);
3264 core->dentry = root;
3270 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3271 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3273 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3274 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3275 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3276 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3284 if (core->num_parents > 0)
3288 if (core->num_parents > 1)
3292 if (core->ops->debug_init)
3293 core->ops->debug_init(core->hw, core->dentry);
3297 * clk_debug_register - add a clk node to the debugfs clk directory
3307 hlist_add_head(&core->debug_node, &clk_debug_list);
3314 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3318 * debugfs clk directory if clk->dentry points to debugfs created by
3324 hlist_del_init(&core->debug_node);
3325 debugfs_remove_recursive(core->dentry);
3326 core->dentry = NULL;
3331 * clk_debug_init - lazily populate the debugfs clk directory
3335 * populates the debugfs clk directory once at boot-time when we know that
3336 * debugfs is setup. It should only be called once at boot-time, all other clks
3377 * walk the list of orphan clocks and reparent any that newly finds a
3386 * clock. This is important for CLK_IS_CRITICAL clocks, which
3400 * __clk_core_init - initialize the data structures in a struct clk_core
3414 return -EINVAL;
3423 if (clk_core_lookup(core->name)) {
3425 __func__, core->name);
3426 ret = -EEXIST;
3430 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3431 if (core->ops->set_rate &&
3432 !((core->ops->round_rate || core->ops->determine_rate) &&
3433 core->ops->recalc_rate)) {
3435 __func__, core->name);
3436 ret = -EINVAL;
3440 if (core->ops->set_parent && !core->ops->get_parent) {
3442 __func__, core->name);
3443 ret = -EINVAL;
3447 if (core->num_parents > 1 && !core->ops->get_parent) {
3449 __func__, core->name);
3450 ret = -EINVAL;
3454 if (core->ops->set_rate_and_parent &&
3455 !(core->ops->set_parent && core->ops->set_rate)) {
3457 __func__, core->name);
3458 ret = -EINVAL;
3463 * optional platform-specific magic
3476 if (core->ops->init) {
3477 ret = core->ops->init(core->hw);
3482 parent = core->parent = __clk_init_parent(core);
3485 * Populate core->parent if parent has already been clk_core_init'd. If
3491 * clocks and re-parent any that are children of the clock currently
3495 hlist_add_head(&core->child_node, &parent->children);
3496 core->orphan = parent->orphan;
3497 } else if (!core->num_parents) {
3498 hlist_add_head(&core->child_node, &clk_root_list);
3499 core->orphan = false;
3501 hlist_add_head(&core->child_node, &clk_orphan_list);
3502 core->orphan = true;
3507 * .recalc_accuracy. For simple clocks and lazy developers the default
3512 if (core->ops->recalc_accuracy)
3513 core->accuracy = core->ops->recalc_accuracy(core->hw,
3516 core->accuracy = parent->accuracy;
3518 core->accuracy = 0;
3529 core->name);
3540 * simple clocks and lazy developers the default fallback is to use the
3544 if (core->ops->recalc_rate)
3545 rate = core->ops->recalc_rate(core->hw,
3548 rate = parent->rate;
3551 core->rate = core->req_rate = rate;
3554 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3556 * reparenting clocks
3558 if (core->flags & CLK_IS_CRITICAL) {
3562 __func__, core->name);
3569 __func__, core->name);
3578 kref_init(&core->ref);
3583 hlist_del_init(&core->child_node);
3594 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3601 hlist_add_head(&clk->clks_node, &core->clks);
3606 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3612 hlist_del(&clk->clks_node);
3616 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3630 return ERR_PTR(-ENOMEM);
3632 clk->core = core;
3633 clk->dev_id = dev_id;
3634 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3635 clk->max_rate = ULONG_MAX;
3641 * free_clk - Free a clk consumer
3649 kfree_const(clk->con_id);
3675 core = hw->core;
3679 clk->dev = dev;
3681 if (!try_module_get(core->owner)) {
3683 return ERR_PTR(-ENOENT);
3686 kref_get(&core->ref);
3693 * clk_hw_get_clk - get clk consumer given an clk_hw
3704 struct device *dev = hw->core->dev;
3716 return -EINVAL;
3722 return -ENOMEM;
3730 u8 num_parents = init->num_parents;
3731 const char * const *parent_names = init->parent_names;
3732 const struct clk_hw **parent_hws = init->parent_hws;
3733 const struct clk_parent_data *parent_data = init->parent_data;
3741 * Avoid unnecessary string look-ups of clk_core's possible parents by
3745 core->parents = parents;
3747 return -ENOMEM;
3751 parent->index = -1;
3756 __func__, core->name);
3757 ret = clk_cpy_name(&parent->name, parent_names[i],
3760 parent->hw = parent_data[i].hw;
3761 parent->index = parent_data[i].index;
3762 ret = clk_cpy_name(&parent->fw_name,
3765 ret = clk_cpy_name(&parent->name,
3769 parent->hw = parent_hws[i];
3771 ret = -EINVAL;
3779 } while (--i >= 0);
3791 int i = core->num_parents;
3793 if (!core->num_parents)
3796 while (--i >= 0) {
3797 kfree_const(core->parents[i].name);
3798 kfree_const(core->parents[i].fw_name);
3801 kfree(core->parents);
3809 const struct clk_init_data *init = hw->init;
3814 * we catch use of hw->init early on in the core.
3816 hw->init = NULL;
3820 ret = -ENOMEM;
3824 core->name = kstrdup_const(init->name, GFP_KERNEL);
3825 if (!core->name) {
3826 ret = -ENOMEM;
3830 if (WARN_ON(!init->ops)) {
3831 ret = -EINVAL;
3834 core->ops = init->ops;
3837 core->rpm_enabled = true;
3838 core->dev = dev;
3839 core->of_node = np;
3840 if (dev && dev->driver)
3841 core->owner = dev->driver->owner;
3842 core->hw = hw;
3843 core->flags = init->flags;
3844 core->num_parents = init->num_parents;
3845 core->min_rate = 0;
3846 core->max_rate = ULONG_MAX;
3847 hw->core = core;
3853 INIT_HLIST_HEAD(&core->clks);
3859 hw->clk = alloc_clk(core, NULL, NULL);
3860 if (IS_ERR(hw->clk)) {
3861 ret = PTR_ERR(hw->clk);
3865 clk_core_link_consumer(hw->core, hw->clk);
3869 return hw->clk;
3872 clk_core_unlink_consumer(hw->clk);
3875 free_clk(hw->clk);
3876 hw->clk = NULL;
3882 kfree_const(core->name);
3890 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
3894 * @dev->parent if dev doesn't have a device node, or NULL if neither
3895 * @dev or @dev->parent have a device node.
3906 np = dev_of_node(dev->parent);
3912 * clk_register - allocate a new clock, register it and return an opaque cookie
3914 * @hw: link to hardware-specific clock data
3931 * clk_hw_register - register a clk_hw and return an error code
3933 * @hw: link to hardware-specific clock data
3948 * of_clk_hw_register - register a clk_hw and return an error code
3950 * @hw: link to hardware-specific clock data
3972 kfree_const(core->name);
3977 * Empty clk_ops for unregistered clocks. These are used temporarily
3983 return -ENXIO;
3994 return -ENXIO;
3999 return -ENXIO;
4017 for (i = 0; i < root->num_parents; i++)
4018 if (root->parents[i].core == target)
4019 root->parents[i].core = NULL;
4021 hlist_for_each_entry(child, &root->children, child_node)
4040 * clk_unregister - unregister a currently registered clock
4051 clk_debug_unregister(clk->core);
4055 ops = clk->core->ops;
4058 clk->core->name);
4066 clk->core->ops = &clk_nodrv_ops;
4069 if (ops->terminate)
4070 ops->terminate(clk->core->hw);
4072 if (!hlist_empty(&clk->core->children)) {
4077 hlist_for_each_entry_safe(child, t, &clk->core->children,
4082 clk_core_evict_parent_cache(clk->core);
4084 hlist_del_init(&clk->core->child_node);
4086 if (clk->core->prepare_count)
4088 __func__, clk->core->name);
4090 if (clk->core->protect_count)
4091 pr_warn("%s: unregistering protected clock: %s\n",
4092 __func__, clk->core->name);
4094 kref_put(&clk->core->ref, __clk_release);
4102 * clk_hw_unregister - unregister a currently registered clk_hw
4103 * @hw: hardware-specific clock data to unregister
4107 clk_unregister(hw->clk);
4122 * devm_clk_register - resource managed clk_register()
4124 * @hw: link to hardware-specific clock data
4128 * Clocks returned from this function are automatically clk_unregister()ed on
4138 return ERR_PTR(-ENOMEM);
4153 * devm_clk_hw_register - resource managed clk_hw_register()
4155 * @hw: link to hardware-specific clock data
4157 * Managed clk_hw_register(). Clocks registered by this function are
4168 return -ENOMEM;
4200 * devm_clk_unregister - resource managed clk_unregister()
4215 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
4216 * @dev: device that is unregistering the hardware-specific clock data
4217 * @hw: link to hardware-specific clock data
4236 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4241 * Managed clk_hw_get_clk(). Clocks got with this function are
4255 WARN_ON_ONCE(dev != hw->core->dev);
4259 return ERR_PTR(-ENOMEM);
4291 if (WARN_ON(clk->exclusive_count)) {
4293 clk->core->protect_count -= (clk->exclusive_count - 1);
4294 clk_core_rate_unprotect(clk->core);
4295 clk->exclusive_count = 0;
4298 hlist_del(&clk->clks_node);
4299 if (clk->min_rate > clk->core->req_rate ||
4300 clk->max_rate < clk->core->req_rate)
4301 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4303 owner = clk->core->owner;
4304 kref_put(&clk->core->ref, __clk_release);
4316 * clk_notifier_register - add a clk rate change notifier
4323 * re-enter into the clk framework by calling any top-level clk APIs;
4330 * clk_notifier_register() must be called from non-atomic context.
4331 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4338 int ret = -ENOMEM;
4341 return -EINVAL;
4347 if (cn->clk == clk)
4355 cn->clk = clk;
4356 srcu_init_notifier_head(&cn->notifier_head);
4358 list_add(&cn->node, &clk_notifier_list);
4361 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4363 clk->core->notifier_count++;
4373 * clk_notifier_unregister - remove a clk rate change notifier
4380 * Returns -EINVAL if called with null arguments; otherwise, passes
4386 int ret = -ENOENT;
4389 return -EINVAL;
4394 if (cn->clk == clk) {
4395 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4397 clk->core->notifier_count--;
4400 if (!cn->notifier_head.head) {
4401 srcu_cleanup_notifier_head(&cn->notifier_head);
4402 list_del(&cn->node);
4424 clk_notifier_unregister(devres->clk, devres->nb);
4437 return -ENOMEM;
4441 devres->clk = clk;
4442 devres->nb = nb;
4460 * struct of_clk_provider - Clock provider registration structure
4501 unsigned int idx = clkspec->args[0];
4503 if (idx >= clk_data->clk_num) {
4505 return ERR_PTR(-EINVAL);
4508 return clk_data->clks[idx];
4516 unsigned int idx = clkspec->args[0];
4518 if (idx >= hw_data->num) {
4520 return ERR_PTR(-EINVAL);
4523 return hw_data->hws[idx];
4528 * of_clk_add_provider() - Register a clock provider for a node
4548 return -ENOMEM;
4550 cp->node = of_node_get(np);
4551 cp->data = data;
4552 cp->get = clk_src_get;
4555 list_add(&cp->link, &of_clk_providers);
4565 fwnode_dev_initialized(&np->fwnode, true);
4572 * of_clk_add_hw_provider() - Register a clock provider for a node
4590 return -ENOMEM;
4592 cp->node = of_node_get(np);
4593 cp->data = data;
4594 cp->get_hw = get;
4597 list_add(&cp->link, &of_clk_providers);
4607 fwnode_dev_initialized(&np->fwnode, true);
4620 * for cases like MFD sub-devices where the child device driver wants to use
4621 * devm_*() APIs but not list the device in DT as a sub-node.
4627 np = dev->of_node;
4628 parent_np = dev->parent ? dev->parent->of_node : NULL;
4630 if (!of_find_property(np, "#clock-cells", NULL))
4631 if (of_find_property(parent_np, "#clock-cells", NULL))
4638 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4644 * node or if the device node lacks of clock provider information (#clock-cells)
4646 * has the #clock-cells then it is used in registration. Provider is
4662 return -ENOMEM;
4678 * of_clk_del_provider() - Remove a previously registered clock provider
4690 if (cp->node == np) {
4691 list_del(&cp->link);
4692 fwnode_dev_initialized(&np->fwnode, false);
4693 of_node_put(cp->node);
4713 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4729 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
4735 * Parses a device node's "clocks" and "clock-names" properties to find the
4738 * parsing error. The @index argument is ignored if @name is non-NULL.
4742 * phandle1: clock-controller@1 {
4743 * #clock-cells = <2>;
4746 * phandle2: clock-controller@2 {
4747 * #clock-cells = <1>;
4750 * clock-consumer@3 {
4751 * clocks = <&phandle1 1 2 &phandle2 3>;
4752 * clock-names = "name1", "name2";
4755 * To get a device_node for `clock-controller@2' node you may call this
4758 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
4759 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
4760 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
4762 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
4763 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
4764 * the "clock-names" property of @np.
4769 int ret = -ENOENT;
4774 * For named clocks, first look up the name in the
4775 * "clock-names" property. If it cannot be found, then index
4777 * return -EINVAL.
4780 index = of_property_match_string(np, "clock-names", name);
4781 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4790 * has a "clock-ranges" property, then we can try one of its
4791 * clocks.
4793 np = np->parent;
4794 if (np && !of_get_property(np, "clock-ranges", NULL))
4808 if (provider->get_hw)
4809 return provider->get_hw(clkspec, provider->data);
4811 clk = provider->get(clkspec, provider->data);
4821 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
4824 return ERR_PTR(-EINVAL);
4828 if (provider->node == clkspec->np) {
4840 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4883 return __of_clk_get(np, index, np->full_name, NULL);
4888 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4892 * This function parses the clocks and clock-names properties,
4899 return ERR_PTR(-ENOENT);
4901 return __of_clk_get(np, 0, np->full_name, name);
4906 * of_clk_get_parent_count() - Count the number of clocks a device node has
4909 * Returns: The number of clocks that are possible parents of this node
4915 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4934 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4943 * specified into an array offset for the clock-output-names property.
4945 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4952 /* We went off the end of 'clock-indices' without finding it */
4956 if (of_property_read_string_index(clkspec.np, "clock-output-names",
4963 * the clock as long as #clock-cells = 0.
4968 clk_name = clkspec.np->name;
4984 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
5030 if (PTR_ERR(clk) == -EPROBE_DEFER)
5046 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5049 * @flags: pointer to top-level framework flags
5051 * Detects if the clock-critical property exists and, if so, sets the
5055 * bindings, such as the one-clock-per-node style that are outdated.
5071 return -EINVAL;
5073 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
5081 * of_clk_init() - Scan and init clock providers from the DT
5100 /* First prepare the list of the clocks providers */
5111 list_del(&clk_provider->node);
5112 of_node_put(clk_provider->np);
5119 parent->clk_init_cb = match->data;
5120 parent->np = of_node_get(np);
5121 list_add_tail(&parent->node, &clk_provider_list);
5128 if (force || parent_ready(clk_provider->np)) {
5131 of_node_set_flag(clk_provider->np,
5134 clk_provider->clk_init_cb(clk_provider->np);
5135 of_clk_set_defaults(clk_provider->np, true);
5137 list_del(&clk_provider->node);
5138 of_node_put(clk_provider->np);