Lines Matching refs:STM32F4_RCC_DCKCFGR
39 #define STM32F4_RCC_DCKCFGR 0x8c macro
561 CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
564 CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
567 STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
1192 STM32F4_RCC_DCKCFGR, 20, 3,
1198 STM32F4_RCC_DCKCFGR, 22, 3,
1219 STM32F4_RCC_DCKCFGR, 20, 3,
1225 STM32F4_RCC_DCKCFGR, 22, 3,
1231 STM32F4_RCC_DCKCFGR, 27, 1,
1237 STM32F4_RCC_DCKCFGR, 28, 1,
1243 STM32F4_RCC_DCKCFGR, 29, 1,
1264 STM32F4_RCC_DCKCFGR, 20, 3,
1270 STM32F4_RCC_DCKCFGR, 22, 3,
1410 STM32F4_RCC_DCKCFGR, 20, 3,
1416 STM32F4_RCC_DCKCFGR, 22, 3,
1553 STM32F4_RCC_DCKCFGR, 25, 1,
1560 STM32F4_RCC_DCKCFGR, 26, 1,