1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
33 	const char *name = np->name;  in of_sama5d2_clk_audio_pll_frac_setup()
50 	       "atmel,sama5d2-clk-audio-pll-frac",
56 	const char *name = np->name;  in of_sama5d2_clk_audio_pll_pad_setup()
73 	       "atmel,sama5d2-clk-audio-pll-pad",
79 	const char *name = np->name;  in of_sama5d2_clk_audio_pll_pmc_setup()
96 	       "atmel,sama5d2-clk-audio-pll-pmc",
150 		if (of_property_read_string(np, "clock-output-names", &name))  in of_sama5d2_clk_generated_setup()
151 			name = gcknp->name;  in of_sama5d2_clk_generated_setup()
153 		of_at91_get_clk_range(gcknp, "atmel,clk-output-range",  in of_sama5d2_clk_generated_setup()
156 		if (of_device_is_compatible(np, "atmel,sama5d2-clk-generated") &&  in of_sama5d2_clk_generated_setup()
172 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",
180 	const char *name = np->name;  in of_sama5d4_clk_h32mx_setup()
196 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
212 	regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");  in of_sama5d2_clk_i2s_mux_setup()
227 		hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,  in of_sama5d2_clk_i2s_mux_setup()
235 CLK_OF_DECLARE(sama5d2_clk_i2s_mux, "atmel,sama5d2-clk-i2s-mux",
242 	const char *name = np->name;  in of_at91rm9200_clk_main_osc_setup()
247 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_main_osc_setup()
248 	bypass = of_property_read_bool(np, "atmel,osc-bypass");  in of_at91rm9200_clk_main_osc_setup()
261 CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
268 	u32 accuracy = 0;  in of_at91sam9x5_clk_main_rc_osc_setup()  local
269 	const char *name = np->name;  in of_at91sam9x5_clk_main_rc_osc_setup()
272 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_main_rc_osc_setup()
273 	of_property_read_u32(np, "clock-frequency", &frequency);  in of_at91sam9x5_clk_main_rc_osc_setup()
274 	of_property_read_u32(np, "clock-accuracy", &accuracy);  in of_at91sam9x5_clk_main_rc_osc_setup()
280 	hw = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);  in of_at91sam9x5_clk_main_rc_osc_setup()
286 CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
293 	const char *name = np->name;  in of_at91rm9200_clk_main_setup()
297 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_main_setup()
309 CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
317 	const char *name = np->name;  in of_at91sam9x5_clk_main_setup()
329 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_main_setup()
338 CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
350 	if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output))  in of_at91_clk_master_get_characteristics()
353 	of_property_read_u32_array(np, "atmel,clk-divisors",  in of_at91_clk_master_get_characteristics()
354 				   characteristics->divisors, 4);  in of_at91_clk_master_get_characteristics()
356 	characteristics->have_div3_pres =  in of_at91_clk_master_get_characteristics()
357 		of_property_read_bool(np, "atmel,master-clk-have-div3-pres");  in of_at91_clk_master_get_characteristics()
373 	const char *name = np->name;  in of_at91_clk_master_setup()
383 	of_property_read_string(np, "clock-output-names", &name);  in of_at91_clk_master_setup()
417 CLK_OF_DECLARE(at91rm9200_clk_master, "atmel,at91rm9200-clk-master",
424 CLK_OF_DECLARE(at91sam9x5_clk_master, "atmel,at91sam9x5-clk-master",
457 		if (of_property_read_string(np, "clock-output-names", &name))  in of_at91_clk_periph_setup()
458 			name = periphclknp->name;  in of_at91_clk_periph_setup()
467 					      "atmel,clk-output-range",  in of_at91_clk_periph_setup()
490 CLK_OF_DECLARE(at91rm9200_clk_periph, "atmel,at91rm9200-clk-peripheral",
497 CLK_OF_DECLARE(at91sam9x5_clk_periph, "atmel,at91sam9x5-clk-peripheral",
514 	if (of_at91_get_clk_range(np, "atmel,clk-input-range", &input))  in of_at91_clk_pll_get_characteristics()
517 	if (of_property_read_u32(np, "#atmel,pll-clk-output-range-cells",  in of_at91_clk_pll_get_characteristics()
524 	if (!of_get_property(np, "atmel,pll-clk-output-ranges", &tmp))  in of_at91_clk_pll_get_characteristics()
551 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
556 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
565 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
574 					       "atmel,pll-clk-output-ranges",  in of_at91_clk_pll_get_characteristics()
580 	characteristics->input = input;  in of_at91_clk_pll_get_characteristics()
581 	characteristics->num_output = num_output;  in of_at91_clk_pll_get_characteristics()
582 	characteristics->output = output;  in of_at91_clk_pll_get_characteristics()
583 	characteristics->out = out;  in of_at91_clk_pll_get_characteristics()
584 	characteristics->icpll = icpll;  in of_at91_clk_pll_get_characteristics()
604 	const char *name = np->name;  in of_at91_clk_pll_setup()
612 	of_property_read_string(np, "clock-output-names", &name);  in of_at91_clk_pll_setup()
638 CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll",
645 CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll",
652 CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb",
659 CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll",
667 	const char *name = np->name;  in of_at91sam9x5_clk_plldiv_setup()
672 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_plldiv_setup()
684 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
719 		if (of_property_read_string(np, "clock-output-names", &name))  in of_at91_clk_prog_setup()
720 			name = progclknp->name;  in of_at91_clk_prog_setup()
736 CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable",
743 CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable",
750 CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable",
758 	const char *name = np->name;  in of_at91sam9260_clk_slow_setup()
770 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9260_clk_slow_setup()
779 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
790 	const char *name = np->name;  in of_at91sam9x5_clk_smd_setup()
799 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_smd_setup()
812 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
838 		if (of_property_read_string(np, "clock-output-names", &name))  in of_at91rm9200_clk_sys_setup()
839 			name = sysclknp->name;  in of_at91rm9200_clk_sys_setup()
850 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",
861 	const char *name = np->name;  in of_at91sam9x5_clk_usb_setup()
870 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_usb_setup()
883 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
890 	const char *name = np->name;  in of_at91sam9n12_clk_usb_setup()
897 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9n12_clk_usb_setup()
909 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
916 	const char *name = np->name;  in of_at91rm9200_clk_usb_setup()
924 	of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);  in of_at91rm9200_clk_usb_setup()
928 	of_property_read_string(np, "clock-output-names", &name);  in of_at91rm9200_clk_usb_setup()
939 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
948 	const char *name = np->name;  in of_at91sam9x5_clk_utmi_setup()
953 	of_property_read_string(np, "clock-output-names", &name);  in of_at91sam9x5_clk_utmi_setup()
961 	 * set in the UTMI Clock Trimming register.  in of_at91sam9x5_clk_utmi_setup()
962 	 * - 9x5: mainck supports several rates but it is indicated that a  in of_at91sam9x5_clk_utmi_setup()
964 	 * - sama5d3 and sama5d2: mainck supports several rates. Configuring  in of_at91sam9x5_clk_utmi_setup()
965 	 *   the FREQ field of the UTMI Clock Trimming register is mandatory.  in of_at91sam9x5_clk_utmi_setup()
966 	 * - sama5d4: mainck is at 12 MHz.  in of_at91sam9x5_clk_utmi_setup()
970 	regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d3-sfr");  in of_at91sam9x5_clk_utmi_setup()
972 		regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");  in of_at91sam9x5_clk_utmi_setup()
983 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",