Lines Matching +full:versatile +full:- +full:lcd

1 # SPDX-License-Identifier: GPL-2.0
44 source "drivers/clk/versatile/Kconfig"
60 	  Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
80 	  These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
90 	  multi-function device has one fixed-rate oscillator, clocked
121 	  be pre-programmed to support other configurations and features not yet
170 	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
180 	  For example, the CDCE925 contains two PLLs with spread-spectrum
190 	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
241 	  clock. These multi-function devices have two (S2MPS14) or three
242 	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
257 	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
273           This driver support the Display output interfaces(LCD, DPHY) pixel clocks
283 	  Support for the APM X-Gene SoC reference, PLL, and device clocks.
391 	  Support for the Canaan Kendryte K210 RISC-V SoC clocks.
395 source "drivers/clk/baikal-t1/Kconfig"
416 source "drivers/clk/sunxi-ng/Kconfig"