50 #define KFLASH_ID	0x89A6		//Intel flash
51 #define KFLASH_ID4	0xB0D4		//Intel flash 4Meg
69 	c2 = inb(0x80);  in get_flash_id()
70 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;  in get_flash_id()
73 	c2 = inb(0x80);  in get_flash_id()
78 	if (c1 == 0xB0)  in get_flash_id()
88 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;  in get_flash_id()
101 		gbWriteBase64Enable = 0;  in flash_ioctl()
102 		gbWriteEnable = 0;  in flash_ioctl()
114 		gbWriteBase64Enable = 0;  in flash_ioctl()
115 		gbWriteEnable = 0;  in flash_ioctl()
120 	return 0;  in flash_ioctl()
129 		printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "  in flash_read()
130 		       "buffer=%p, count=0x%zx.\n", *ppos, buf, size);  in flash_read()
153 		printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",  in flash_write()
166 		return count ? -ENXIO : 0;  in flash_write()
180 	written = 0;  in flash_write()
192 	if (((int) (p + count) & 0xFFFF) == 0)  in flash_write()
206 		i = 0;  in flash_write()
207 		j = 0;  in flash_write()
245 		if (rc < 0) {  in flash_write()
255 			printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);  in flash_write()
267  * though, in that case (0).
278 		printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",  in flash_llseek()
300 	 * reset footbridge to the correct offset 0 (...0..3)  in erase_block()
302 	*CSR_ROMWRITEREG = 0;  in erase_block()
307 	c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);  in erase_block()
313 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;  in erase_block()
319 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));  in erase_block()
329 	*(volatile unsigned char *) pWritePtr = 0x20;  in erase_block()
334 	*(volatile unsigned char *) pWritePtr = 0xD0;  in erase_block()
345 	c1 = 0;  in erase_block()
346 	while (!(c1 & 0x80) && time_before(jiffies, timeout)) {  in erase_block()
359 //      *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;  in erase_block()
360 	*(volatile unsigned char *) pWritePtr = 0xFF;	//back to normal operation  in erase_block()
365 	if (c1 & 0x20) {  in erase_block()
371 		*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;  in erase_block()
382 	for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {  in erase_block()
383 		if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {  in erase_block()
390 	return 0;  in erase_block()
412 	offset = p & 0xFFFF;  in write_block()
414 	if (offset + count > 0x10000)  in write_block()
415 		count = 0x10000 - offset;  in write_block()
422 	for (offset = 0; offset < count; offset++, pWritePtr++) {  in write_block()
424 		uAddress &= 0xFFFFFFFC;  in write_block()
432 		c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);  in write_block()
440 		 * program footbridge to the correct offset...0..3  in write_block()
447 		*(volatile unsigned char *) (uAddress) = 0x40;  in write_block()
457 		*(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;  in write_block()
459 		c1 = 0;  in write_block()
469 		while (!(c1 & 0x80) && time_before(jiffies, timeout1))  in write_block()
470 			c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);  in write_block()
480 			*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;  in write_block()
491 		*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;  in write_block()
497 		if (c1 & 0x10) {  in write_block()
502 			*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;  in write_block()
509 					printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",  in write_block()
519 				printk(KERN_ERR "write_block: timeout at 0x%X\n",  in write_block()
534 	for (offset = 0; offset < count; offset++) {  in write_block()
540 			printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",  in write_block()
542 			return 0;  in write_block()
599 			printk("Flash: incorrect ID 0x%04X.\n", id);  in nwflash_init()
603 		printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",  in nwflash_init()
607 		if (ret < 0) {  in nwflash_init()