34  * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix
51  *	ICH2	errata #21	- DMA mode 0 doesn't work right
65  *				  (BIOS must set dev 31 fn 0 bit 23)
85 	PIIX_IOCFG		= 0x54, /* IDE I/O configuration register */
86 	ICH5_PMR		= 0x90, /* address map register */
87 	ICH5_PCS		= 0x92,	/* port control and status */
90 	PIIX_SIDPR_IDX		= 0,
105 	P0			= 0,  /* port 0 */
156 	{ 0x8086, 0x7010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_mwdma },
158 	{ 0x8086, 0x7111, 0x15ad, 0x1976, 0, 0, piix_pata_vmw },
161 	{ 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
163 	{ 0x8086, 0x7199, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
165 	{ 0x8086, 0x7601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
167 	{ 0x8086, 0x84CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
169 	{ 0x8086, 0x2411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_66 },
171 	{ 0x8086, 0x2421, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_33 },
173 	{ 0x8086, 0x244A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
175 	{ 0x8086, 0x244B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
177 	{ 0x8086, 0x248A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
179 	{ 0x8086, 0x248B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
181 	{ 0x8086, 0x24C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
183 	{ 0x8086, 0x24CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
184 	{ 0x8086, 0x24CB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
186 	{ 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
188 	{ 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
190 	{ 0x8086, 0x25A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
192 	{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
194 	{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
195 	{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
197 	{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
202 	{ 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
204 	{ 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
206 	{ 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
208 	{ 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
210 	{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
212 	{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
213 	/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
215 	{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID,
216 	  PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata },
218 	{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
220 	{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata },
222 	{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
224 	{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
226 	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
228 	{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
229 	{ 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata },
230 	{ 0x8086, 0x2828, 0x106b, 0x00a3, 0, 0, ich8m_apple_sata },
232 	{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
234 	{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
236 	{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
238 	{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
240 	{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
242 	{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
244 	{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
246 	{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata },
248 	{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
250 	{ 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
252 	{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
254 	{ 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
256 	{ 0x8086, 0x3b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
258 	{ 0x8086, 0x3b21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
260 	{ 0x8086, 0x3b26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
262 	{ 0x8086, 0x3b28, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
264 	{ 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
266 	{ 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
268 	{ 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
270 	{ 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
272 	{ 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
274 	{ 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
276 	{ 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
278 	{ 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
280 	{ 0x8086, 0x1e00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
282 	{ 0x8086, 0x1e01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
284 	{ 0x8086, 0x1e08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
286 	{ 0x8086, 0x1e09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
288 	{ 0x8086, 0x8c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
290 	{ 0x8086, 0x8c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
292 	{ 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
294 	{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
296 	{ 0x8086, 0x9c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
298 	{ 0x8086, 0x9c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
300 	{ 0x8086, 0x9c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
302 	{ 0x8086, 0x9c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
304 	{ 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
306 	{ 0x8086, 0x1f20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
308 	{ 0x8086, 0x1f21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
310 	{ 0x8086, 0x1f30, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
312 	{ 0x8086, 0x1f31, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
314 	{ 0x8086, 0x8d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
316 	{ 0x8086, 0x8d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
318 	{ 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
320 	{ 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
322 	{ 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
323 	{ 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
325 	{ 0x8086, 0x23a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
327 	{ 0x8086, 0x8c88, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
329 	{ 0x8086, 0x8c89, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
331 	{ 0x8086, 0x8c80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
333 	{ 0x8086, 0x8c81, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
339 	.mask = 0x7,
340 	.port_enable = 0x3,
355 	.mask = 0x3,
356 	.port_enable = 0xf,
367 	.mask = 0x3,
368 	.port_enable = 0x5,
384 	.mask = 0x3,
385 	.port_enable = 0xf,
396 	.mask = 0x3,
397 	.port_enable = 0x3,
408 	.mask = 0x3,
409 	.port_enable = 0x1,
420 	.mask = 0x3,
421 	.port_enable = 0x3,
445 	{ 0x41U, 1U, 0x80UL, 0x80UL },	/* port 0 */
446 	{ 0x43U, 1U, 0x80UL, 0x80UL },	/* port 1 */
467 	{ 0x27DF, 0x0005, 0x0280 },	/* ICH7 on Acer 5602WLMi */
468 	{ 0x27DF, 0x1025, 0x0102 },	/* ICH7 on Acer 5602aWLMi */
469 	{ 0x27DF, 0x1025, 0x0110 },	/* ICH7 on Acer 3682WLMi */
470 	{ 0x27DF, 0x1028, 0x02b0 },	/* ICH7 on unknown Dell */
471 	{ 0x27DF, 0x1043, 0x1267 },	/* ICH7 on Asus W5F */
472 	{ 0x27DF, 0x103C, 0x30A1 },	/* ICH7 on HP Compaq nc2400 */
473 	{ 0x27DF, 0x103C, 0x361a },	/* ICH7 on unknown HP  */
474 	{ 0x27DF, 0x1071, 0xD221 },	/* ICH7 on Hercules EC-900 */
475 	{ 0x27DF, 0x152D, 0x0778 },	/* ICH7 on unknown Intel */
476 	{ 0x24CA, 0x1025, 0x0061 },	/* ICH4 on ACER Aspire 2023WLMi */
477 	{ 0x24CA, 0x1025, 0x003d },	/* ICH4 on ACER TM290 */
478 	{ 0x24CA, 0x10CF, 0x11AB },	/* ICH4M on Fujitsu-Siemens Lifebook S6120 */
479 	{ 0x266F, 0x1025, 0x0066 },	/* ICH6 on ACER Aspire 1694WLMi */
480 	{ 0x2653, 0x1043, 0x82D8 },	/* ICH6M on Asus Eee 701 */
481 	{ 0x27df, 0x104d, 0x900e },	/* ICH7 on Sony TZ-90 */
483 	{ 0, }
509 	const struct ich_laptop *lap = &ich_laptop[0];  in ich_pata_cable_detect()
523 	mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;  in ich_pata_cable_detect()
524 	if ((hpriv->saved_iocfg & mask) == 0)  in ich_pata_cable_detect()
554 	unsigned int is_slave	= (adev->devno != 0);  in piix_set_timings()
555 	unsigned int master_port= ap->port_no ? 0x42 : 0x40;  in piix_set_timings()
556 	unsigned int slave_port	= 0x44;  in piix_set_timings()
560 	int control = 0;  in piix_set_timings()
568 	u8 timings[][2]	= { { 0, 0 },  in piix_set_timings()
569 			    { 0, 0 },  in piix_set_timings()
570 			    { 1, 0 },  in piix_set_timings()
598 		master_data &= 0xff0f;  in piix_set_timings()
602 		slave_data &= (ap->port_no ? 0x0f : 0xf0);  in piix_set_timings()
604 		slave_data |= ((timings[pio][0] << 2) | timings[pio][1])  in piix_set_timings()
605 						<< (ap->port_no ? 4 : 0);  in piix_set_timings()
608 		master_data &= 0xccf0;  in piix_set_timings()
613 			(timings[pio][0] << 12) |  in piix_set_timings()
618 	master_data |= 0x4000;  in piix_set_timings()
627 		pci_read_config_byte(dev, 0x48, &udma_enable);  in piix_set_timings()
629 		pci_write_config_byte(dev, 0x48, udma_enable);  in piix_set_timings()
669 	u8 udma_enable		= 0;  in do_pata_set_dmamode()
679 		pci_read_config_byte(dev, 0x48, &udma_enable);  in do_pata_set_dmamode()
690 			u_clock = 0x1000;	/* 100Mhz */  in do_pata_set_dmamode()
694 			u_clock = 0;		/* 33Mhz */  in do_pata_set_dmamode()
699 		pci_read_config_word(dev, 0x4A, &udma_timing);  in do_pata_set_dmamode()
702 		pci_write_config_word(dev, 0x4A, udma_timing);  in do_pata_set_dmamode()
706 			pci_read_config_word(dev, 0x54, &ideconf);  in do_pata_set_dmamode()
707 			ideconf &= ~(0x1001 << devid);  in do_pata_set_dmamode()
711 			pci_write_config_word(dev, 0x54, ideconf);  in do_pata_set_dmamode()
714 		pci_write_config_byte(dev, 0x48, udma_enable);  in do_pata_set_dmamode()
743 	do_pata_set_dmamode(ap, adev, 0);  in piix_set_dmamode()
771 	[SCR_STATUS]	= 0,
795 	return 0;  in piix_sidpr_scr_read()
808 	return 0;  in piix_sidpr_scr_write()
983 	return 0;  in piix_broken_suspend()
990 	int rc = 0;  in piix_pci_device_suspend()
1018 	return 0;  in piix_pci_device_suspend()
1047 	if (rc == 0)  in piix_pci_device_resume()
1111 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1119 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1227 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1267 #define AHCI_GLOBAL_CTL 0x04
1273 	int rc = 0;  in piix_disable_ahci()
1281 		return 0;  in piix_disable_ahci()
1313 	int no_piix_dma = 0;  in piix_check_450nx_errata()
1318 		pci_read_config_word(pdev, 0x41, &cfg);  in piix_check_450nx_errata()
1320 		if (pdev->revision == 0x00)  in piix_check_450nx_errata()
1346 		DPRINTK("updating PCS from 0x%x to 0x%x\n", pcs, new_pcs);  in piix_init_pcs()
1357 	int i, invalid_map = 0;  in piix_init_sata_map()
1366 	for (i = 0; i < 4; i++) {  in piix_init_sata_map()
1421 	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&  in piix_no_sidpr()
1423 	    pdev->subsystem_device == 0xb049) {  in piix_no_sidpr()
1436 	struct ata_link *link0 = &host->ports[0]->link;  in piix_init_sidpr()
1441 	for (i = 0; i < 4; i++)  in piix_init_sidpr()
1443 			return 0;  in piix_init_sidpr()
1447 		return 0;  in piix_init_sidpr()
1449 	if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))  in piix_init_sidpr()
1450 		return 0;  in piix_init_sidpr()
1452 	if (pci_resource_start(pdev, PIIX_SIDPR_BAR) == 0 ||  in piix_init_sidpr()
1454 		return 0;  in piix_init_sidpr()
1457 		return 0;  in piix_init_sidpr()
1471 	if ((scontrol & 0xf00) != 0x300) {  in piix_init_sidpr()
1472 		scontrol |= 0x300;  in piix_init_sidpr()
1476 		if ((scontrol & 0xf00) != 0x300) {  in piix_init_sidpr()
1479 			return 0;  in piix_init_sidpr()
1484 	for (i = 0; i < 2; i++) {  in piix_init_sidpr()
1496 	return 0;  in piix_init_sidpr()
1543 			.driver_data = (void *)0x1FUL,  in piix_broken_system_poweroff()
1552 			.driver_data = (void *)0x1FUL,  in piix_broken_system_poweroff()
1569 module_param(prefer_ms_hyperv, int, 0);
1572 	"0 - Use ATA drivers, "
1643 	const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] };  in piix_init_one()
1664 	port_info[0] = piix_port_info[ent->driver_data];  in piix_init_one()
1667 	port_flags = port_info[0].flags;  in piix_init_one()
1689 	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {  in piix_init_one()
1711 		if (host->ports[0]->ops == &piix_sidpr_sata_ops)  in piix_init_one()
1731 		host->ports[0]->mwdma_mask = 0;  in piix_init_one()
1732 		host->ports[0]->udma_mask = 0;  in piix_init_one()
1733 		host->ports[1]->mwdma_mask = 0;  in piix_init_one()
1734 		host->ports[1]->udma_mask = 0;  in piix_init_one()
1775 	in_module_init = 0;  in piix_init()
1778 	return 0;  in piix_init()