Lines Matching +full:smp +full:- +full:capable
1 # SPDX-License-Identifier: GPL-2.0
48 Xtensa processors are 32-bit RISC machines designed by Tensilica
53 a home page at <http://www.linux-xtensa.org/>.
88 def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1)
100 bool "fsf - default (not generic) configuration"
104 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
111 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
147 ie: it supports a TLB with auto-loading, page protection.
185 bool "System Supports SMP (MX)"
189 This option is used to indicate that the system-on-a-chip (SOC)
200 You still have to select "Enable SMP" to enable SMP on this SOC.
202 config SMP config
203 bool "Enable Symmetric multi-processing support"
207 Enabled SMP Software; allows more than one CPU/CORE
211 depends on SMP
212 int "Maximum number of CPUs (2-32)"
218 depends on SMP
330 XT2000 is the name of Tensilica's feature-rich emulation platform.
331 This hardware is capable of running a full Linux distribution.
342 This hardware is capable of running a full Linux distribution.
371 architectures, you should supply some command-line options at build
418 tristate "Host file-based simulated block device support"
427 int "Number of host file-based simulated block devices"
450 Another simulated disk in a host file for a buildroot-independent
475 bool "Use 8-bit access to XTFPGA LCD"
479 LCD may be connected with 4- or 8-bit interface, 8-bit access may
480 only be used with 8-bit interface. Please consult prototyping user
496 This unfortunately won't work for U-Boot and likely also won't
502 xt-gdb can't place a Software Breakpoint in the 0XD region prior
510 Selecting this will cause U-Boot to set the KERNEL Load and Entry
516 bool "Kernel Execute-In-Place from ROM"
519 Execute-In-Place allows the kernel to run from non-volatile storage
522 to RAM. Read-write sections, such as the data section and stack,
543 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
544 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
563 2: WB, no-write-allocate cache,
609 placed at their hardware-defined locations.
626 XIP-aware MTD support.