Lines Matching +full:bank +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-only
3 * (c) 2005-2016 Advanced Micro Devices, Inc.
5 * Written by Jacob Shin - AMD, Inc.
75 const char *name; /* Short name for sysfs */ member
76 const char *long_name; /* Long name for pretty-printing */
110 return smca_names[t].name; in smca_get_name()
122 static enum smca_bank_types smca_get_bank_type(unsigned int bank) in smca_get_bank_type() argument
126 if (bank >= MAX_NR_BANKS) in smca_get_bank_type()
129 b = &smca_banks[bank]; in smca_get_bank_type()
130 if (!b->hwid) in smca_get_bank_type()
133 return b->hwid->bank_type; in smca_get_bank_type()
198 * So to define a unique name for each bank, we use a temp c-string to append
199 * the MCA_IPID[InstanceId] to type's name in get_name().
202 * is greater than 8 plus 1 (for underscore) plus length of longest type name.
227 static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu) in smca_set_misc_banks_map() argument
233 * (MCx_MISC0) indicates presence of additional MISC regs set (MISC1-4). in smca_set_misc_banks_map()
235 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high)) in smca_set_misc_banks_map()
241 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high)) in smca_set_misc_banks_map()
245 per_cpu(smca_misc_banks_map, cpu) |= BIT(bank); in smca_set_misc_banks_map()
249 static void smca_configure(unsigned int bank, unsigned int cpu) in smca_configure() argument
254 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); in smca_configure()
261 * bank. It also means that the OS will configure deferred in smca_configure()
270 * SMCA sets the Deferred Error Interrupt type per bank. in smca_configure()
286 smca_set_misc_banks_map(bank, cpu); in smca_configure()
288 /* Return early if this bank was already initialized. */ in smca_configure()
289 if (smca_banks[bank].hwid && smca_banks[bank].hwid->hwid_mcatype != 0) in smca_configure()
292 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) { in smca_configure()
293 pr_warn("Failed to read MCA_IPID for bank %d\n", bank); in smca_configure()
302 if (hwid_mcatype == s_hwid->hwid_mcatype) { in smca_configure()
303 smca_banks[bank].hwid = s_hwid; in smca_configure()
304 smca_banks[bank].id = low; in smca_configure()
305 smca_banks[bank].sysfs_id = s_hwid->count++; in smca_configure()
319 static inline bool is_shared_bank(int bank) in is_shared_bank() argument
323 * a shared bank. in is_shared_bank()
328 /* Bank 4 is for northbridge reporting and is thus shared */ in is_shared_bank()
329 return (bank == 4); in is_shared_bank()
334 switch (b->address) { in bank4_names()
346 WARN(1, "Funny MSR: 0x%08x\n", b->address); in bank4_names()
352 static bool lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits) in lvt_interrupt_supported() argument
355 * bank 4 supports APIC LVT interrupts implicitly since forever. in lvt_interrupt_supported()
357 if (bank == 4) in lvt_interrupt_supported()
362 * bank can generate APIC LVT interrupts in lvt_interrupt_supported()
373 "for bank %d, block %d (MSR%08X=0x%x%08x)\n", b->cpu, in lvt_off_valid()
374 b->bank, b->block, b->address, hi, lo); in lvt_off_valid()
388 "for bank %d, block %d (MSR%08X=0x%x%08x)\n", in lvt_off_valid()
389 b->cpu, apic, b->bank, b->block, b->address, hi, lo); in lvt_off_valid()
396 /* Reprogram MCx_MISC MSR behind this threshold bank. */
406 rdmsr(tr->b->address, lo, hi); in threshold_restart_bank()
408 if (tr->b->threshold_limit < (hi & THRESHOLD_MAX)) in threshold_restart_bank()
409 tr->reset = 1; /* limit cannot be lower than err count */ in threshold_restart_bank()
411 if (tr->reset) { /* reset err count and overflow bit */ in threshold_restart_bank()
414 (THRESHOLD_MAX - tr->b->threshold_limit); in threshold_restart_bank()
415 } else if (tr->old_limit) { /* change limit w/o reset */ in threshold_restart_bank()
417 (tr->old_limit - tr->b->threshold_limit); in threshold_restart_bank()
426 if (!tr->b->interrupt_capable) in threshold_restart_bank()
429 if (tr->set_lvt_off) { in threshold_restart_bank()
430 if (lvt_off_valid(tr->b, tr->lvt_off, lo, hi)) { in threshold_restart_bank()
433 hi |= tr->lvt_off << 20; in threshold_restart_bank()
437 if (tr->b->interrupt_enable) in threshold_restart_bank()
443 wrmsr(tr->b->address, lo, hi); in threshold_restart_bank()
454 b->threshold_limit = THRESHOLD_MAX; in mce_threshold_block_init()
479 int def_offset = -1, def_new; in deferred_error_interrupt_enable()
502 static u32 smca_get_block_address(unsigned int bank, unsigned int block, in smca_get_block_address() argument
506 return MSR_AMD64_SMCA_MCx_MISC(bank); in smca_get_block_address()
508 if (!(per_cpu(smca_misc_banks_map, cpu) & BIT(bank))) in smca_get_block_address()
511 return MSR_AMD64_SMCA_MCx_MISCy(bank, block - 1); in smca_get_block_address()
515 unsigned int bank, unsigned int block, in get_block_address() argument
520 if ((bank >= per_cpu(mce_num_banks, cpu)) || (block >= NR_BLOCKS)) in get_block_address()
524 return smca_get_block_address(bank, block, cpu); in get_block_address()
529 addr = msr_ops.misc(bank); in get_block_address()
543 prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr, in prepare_threshold_block() argument
552 per_cpu(bank_map, cpu) |= (1 << bank); in prepare_threshold_block()
556 b.bank = bank; in prepare_threshold_block()
559 b.interrupt_capable = lvt_interrupt_supported(bank, misc_high); in prepare_threshold_block()
591 enum smca_bank_types bank_type = smca_get_bank_type(m->bank); in amd_filter_mce()
594 /* See Family 17h Models 10h-2Fh Erratum #1114. */ in amd_filter_mce()
595 if (c->x86 == 0x17 && in amd_filter_mce()
596 c->x86_model >= 0x10 && c->x86_model <= 0x2F && in amd_filter_mce()
597 bank_type == SMCA_IF && XEC(m->status, 0x3f) == 10) in amd_filter_mce()
601 if (c->x86 < 0x17) { in amd_filter_mce()
602 if (m->bank == 4 && XEC(m->status, 0x1f) == 0x5) in amd_filter_mce()
611 * - MC4_MISC thresholding is not supported on Family 0x15.
612 * - Prevent possible spurious interrupts from the IF bank on Family 0x17
613 * Models 0x10-0x2F due to Erratum #1114.
615 static void disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank) in disable_err_thresholding() argument
622 if (c->x86 == 0x15 && bank == 4) { in disable_err_thresholding()
626 } else if (c->x86 == 0x17 && in disable_err_thresholding()
627 (c->x86_model >= 0x10 && c->x86_model <= 0x2F)) { in disable_err_thresholding()
629 if (smca_get_bank_type(bank) != SMCA_IF) in disable_err_thresholding()
632 msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank); in disable_err_thresholding()
657 unsigned int bank, block, cpu = smp_processor_id(); in mce_amd_feature_init() local
659 int offset = -1; in mce_amd_feature_init()
662 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in mce_amd_feature_init()
664 smca_configure(bank, cpu); in mce_amd_feature_init()
666 disable_err_thresholding(c, bank); in mce_amd_feature_init()
669 address = get_block_address(address, low, high, bank, block, cpu); in mce_amd_feature_init()
683 offset = prepare_threshold_block(bank, block, address, offset, high); in mce_amd_feature_init()
716 ret_addr -= hi_addr_offset; in umc_normaddr_to_sysaddr()
754 /* Re-use intlv_num_chan by setting it equal to log2(#channels) */ in umc_normaddr_to_sysaddr()
810 cs_mask = (1 << die_id_bit) - 1; in umc_normaddr_to_sysaddr()
839 * The pre-interleaved address consists of XXXXXXIIIYYYYY in umc_normaddr_to_sysaddr()
841 * address bits from the post-interleaved address. in umc_normaddr_to_sysaddr()
846 temp_addr_y = ret_addr & GENMASK_ULL(intlv_addr_bit-1, 0); in umc_normaddr_to_sysaddr()
862 ret_addr += (BIT_ULL(32) - dram_hole_base); in umc_normaddr_to_sysaddr()
866 /* Save some parentheses and grab ls-bit at the end. */ in umc_normaddr_to_sysaddr()
887 return -EINVAL; in umc_normaddr_to_sysaddr()
894 u8 xec = (m->status >> 16) & 0x1f; in amd_mce_is_memory_error()
897 return smca_get_bank_type(m->bank) == SMCA_UMC && xec == 0x0; in amd_mce_is_memory_error()
899 return m->bank == 4 && xec == 0x8; in amd_mce_is_memory_error()
902 static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) in __log_error() argument
910 m.bank = bank; in __log_error()
928 rdmsrl(MSR_AMD64_SMCA_MCx_IPID(bank), m.ipid); in __log_error()
931 rdmsrl(MSR_AMD64_SMCA_MCx_SYND(bank), m.synd); in __log_error()
950 _log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc) in _log_error_bank() argument
961 __log_error(bank, status, addr, misc); in _log_error_bank()
971 * 1) Non-SMCA systems check MCA_STATUS and log error if found.
977 static void log_error_deferred(unsigned int bank) in log_error_deferred() argument
981 defrd = _log_error_bank(bank, msr_ops.status(bank), in log_error_deferred()
982 msr_ops.addr(bank), 0); in log_error_deferred()
989 wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(bank), 0); in log_error_deferred()
997 _log_error_bank(bank, MSR_AMD64_SMCA_MCx_DESTAT(bank), in log_error_deferred()
998 MSR_AMD64_SMCA_MCx_DEADDR(bank), 0); in log_error_deferred()
1004 unsigned int bank; in amd_deferred_error_interrupt() local
1006 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) in amd_deferred_error_interrupt()
1007 log_error_deferred(bank); in amd_deferred_error_interrupt()
1010 static void log_error_thresholding(unsigned int bank, u64 misc) in log_error_thresholding() argument
1012 _log_error_bank(bank, msr_ops.status(bank), msr_ops.addr(bank), misc); in log_error_thresholding()
1023 if (rdmsr_safe(block->address, &low, &high)) in log_and_reset_block()
1030 log_error_thresholding(block->bank, ((u64)high << 32) | low); in log_and_reset_block()
1046 unsigned int bank, cpu = smp_processor_id(); in amd_threshold_interrupt() local
1049 * Validate that the threshold bank has been initialized already. The in amd_threshold_interrupt()
1056 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in amd_threshold_interrupt()
1057 if (!(per_cpu(bank_map, cpu) & (1 << bank))) in amd_threshold_interrupt()
1060 first_block = bp[bank]->blocks; in amd_threshold_interrupt()
1069 list_for_each_entry_safe(block, tmp, &first_block->miscj, miscj) in amd_threshold_interrupt()
1084 #define SHOW_FIELDS(name) \ argument
1085 static ssize_t show_ ## name(struct threshold_block *b, char *buf) \
1087 return sprintf(buf, "%lu\n", (unsigned long) b->name); \
1098 if (!b->interrupt_capable) in SHOW_FIELDS()
1099 return -EINVAL; in SHOW_FIELDS()
1102 return -EINVAL; in SHOW_FIELDS()
1104 b->interrupt_enable = !!new; in SHOW_FIELDS()
1109 if (smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1)) in SHOW_FIELDS()
1110 return -ENODEV; in SHOW_FIELDS()
1122 return -EINVAL; in store_threshold_limit()
1130 tr.old_limit = b->threshold_limit; in store_threshold_limit()
1131 b->threshold_limit = new; in store_threshold_limit()
1134 if (smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1)) in store_threshold_limit()
1135 return -ENODEV; in store_threshold_limit()
1145 if (rdmsr_on_cpu(b->cpu, b->address, &lo, &hi)) in show_error_count()
1146 return -ENODEV; in show_error_count()
1148 return sprintf(buf, "%u\n", ((hi & THRESHOLD_MAX) - in show_error_count()
1149 (THRESHOLD_MAX - b->threshold_limit))); in show_error_count()
1153 .attr = {.name = __stringify(error_count), .mode = 0444 },
1159 .attr = {.name = __stringify(val), .mode = 0644 }, \
1183 ret = a->show ? a->show(b, buf) : -EIO; in show()
1195 ret = a->store ? a->store(b, buf, count) : -EIO; in store()
1213 static const char *get_name(unsigned int bank, struct threshold_block *b) in get_name() argument
1218 if (b && bank == 4) in get_name()
1221 return th_names[bank]; in get_name()
1224 bank_type = smca_get_bank_type(bank); in get_name()
1229 if (b->block < ARRAY_SIZE(smca_umc_block_names)) in get_name()
1230 return smca_umc_block_names[b->block]; in get_name()
1234 if (smca_banks[bank].hwid->count == 1) in get_name()
1239 smca_banks[bank].sysfs_id); in get_name()
1244 unsigned int bank, unsigned int block, in allocate_threshold_blocks() argument
1251 if ((bank >= this_cpu_read(mce_num_banks)) || (block >= NR_BLOCKS)) in allocate_threshold_blocks()
1270 return -ENOMEM; in allocate_threshold_blocks()
1272 b->block = block; in allocate_threshold_blocks()
1273 b->bank = bank; in allocate_threshold_blocks()
1274 b->cpu = cpu; in allocate_threshold_blocks()
1275 b->address = address; in allocate_threshold_blocks()
1276 b->interrupt_enable = 0; in allocate_threshold_blocks()
1277 b->interrupt_capable = lvt_interrupt_supported(bank, high); in allocate_threshold_blocks()
1278 b->threshold_limit = THRESHOLD_MAX; in allocate_threshold_blocks()
1280 if (b->interrupt_capable) { in allocate_threshold_blocks()
1282 b->interrupt_enable = 1; in allocate_threshold_blocks()
1287 INIT_LIST_HEAD(&b->miscj); in allocate_threshold_blocks()
1290 if (tb->blocks) in allocate_threshold_blocks()
1291 list_add(&b->miscj, &tb->blocks->miscj); in allocate_threshold_blocks()
1293 tb->blocks = b; in allocate_threshold_blocks()
1295 err = kobject_init_and_add(&b->kobj, &threshold_ktype, tb->kobj, get_name(bank, b)); in allocate_threshold_blocks()
1299 address = get_block_address(address, low, high, bank, ++block, cpu); in allocate_threshold_blocks()
1303 err = allocate_threshold_blocks(cpu, tb, bank, block, address); in allocate_threshold_blocks()
1308 kobject_uevent(&b->kobj, KOBJ_ADD); in allocate_threshold_blocks()
1314 list_del(&b->miscj); in allocate_threshold_blocks()
1315 kobject_put(&b->kobj); in allocate_threshold_blocks()
1322 struct list_head *head = &b->blocks->miscj; in __threshold_add_blocks()
1327 err = kobject_add(&b->blocks->kobj, b->kobj, b->blocks->kobj.name); in __threshold_add_blocks()
1333 err = kobject_add(&pos->kobj, b->kobj, pos->kobj.name); in __threshold_add_blocks()
1336 kobject_del(&pos->kobj); in __threshold_add_blocks()
1345 unsigned int bank) in threshold_create_bank() argument
1350 const char *name = get_name(bank, NULL); in threshold_create_bank() local
1354 return -ENODEV; in threshold_create_bank()
1356 if (is_shared_bank(bank)) { in threshold_create_bank()
1360 if (nb && nb->bank4) { in threshold_create_bank()
1362 b = nb->bank4; in threshold_create_bank()
1363 err = kobject_add(b->kobj, &dev->kobj, name); in threshold_create_bank()
1367 bp[bank] = b; in threshold_create_bank()
1368 refcount_inc(&b->cpus); in threshold_create_bank()
1378 err = -ENOMEM; in threshold_create_bank()
1382 /* Associate the bank with the per-CPU MCE device */ in threshold_create_bank()
1383 b->kobj = kobject_create_and_add(name, &dev->kobj); in threshold_create_bank()
1384 if (!b->kobj) { in threshold_create_bank()
1385 err = -EINVAL; in threshold_create_bank()
1389 if (is_shared_bank(bank)) { in threshold_create_bank()
1390 b->shared = 1; in threshold_create_bank()
1391 refcount_set(&b->cpus, 1); in threshold_create_bank()
1395 WARN_ON(nb->bank4); in threshold_create_bank()
1396 nb->bank4 = b; in threshold_create_bank()
1400 err = allocate_threshold_blocks(cpu, b, bank, 0, msr_ops.misc(bank)); in threshold_create_bank()
1404 bp[bank] = b; in threshold_create_bank()
1408 kobject_put(b->kobj); in threshold_create_bank()
1420 static void deallocate_threshold_blocks(struct threshold_bank *bank) in deallocate_threshold_blocks() argument
1424 list_for_each_entry_safe(pos, tmp, &bank->blocks->miscj, miscj) { in deallocate_threshold_blocks()
1425 list_del(&pos->miscj); in deallocate_threshold_blocks()
1426 kobject_put(&pos->kobj); in deallocate_threshold_blocks()
1429 kobject_put(&bank->blocks->kobj); in deallocate_threshold_blocks()
1437 kobject_del(b->kobj); in __threshold_remove_blocks()
1439 list_for_each_entry_safe(pos, tmp, &b->blocks->miscj, miscj) in __threshold_remove_blocks()
1440 kobject_del(&pos->kobj); in __threshold_remove_blocks()
1443 static void threshold_remove_bank(struct threshold_bank *bank) in threshold_remove_bank() argument
1447 if (!bank->blocks) in threshold_remove_bank()
1450 if (!bank->shared) in threshold_remove_bank()
1453 if (!refcount_dec_and_test(&bank->cpus)) { in threshold_remove_bank()
1454 __threshold_remove_blocks(bank); in threshold_remove_bank()
1458 * The last CPU on this node using the shared bank is going in threshold_remove_bank()
1459 * away, remove that bank now. in threshold_remove_bank()
1462 nb->bank4 = NULL; in threshold_remove_bank()
1466 deallocate_threshold_blocks(bank); in threshold_remove_bank()
1469 kobject_put(bank->kobj); in threshold_remove_bank()
1470 kfree(bank); in threshold_remove_bank()
1476 unsigned int bank, numbanks = this_cpu_read(mce_num_banks); in mce_threshold_remove_device() local
1487 for (bank = 0; bank < numbanks; bank++) { in mce_threshold_remove_device()
1488 if (bp[bank]) { in mce_threshold_remove_device()
1489 threshold_remove_bank(bp[bank]); in mce_threshold_remove_device()
1490 bp[bank] = NULL; in mce_threshold_remove_device()
1498 * mce_threshold_create_device - Create the per-CPU MCE threshold device
1510 unsigned int numbanks, bank; in mce_threshold_create_device() local
1524 return -ENOMEM; in mce_threshold_create_device()
1526 for (bank = 0; bank < numbanks; ++bank) { in mce_threshold_create_device()
1527 if (!(this_cpu_read(bank_map) & (1 << bank))) in mce_threshold_create_device()
1529 err = threshold_create_bank(bp, cpu, bank); in mce_threshold_create_device()