Lines Matching +full:64 +full:- +full:byte
1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <asm/processor-flags.h>
62 * This could fault if CR4 does not exist. Non-existent CR4 in native_read_cr4()
89 asm volatile(".byte 0x0f,0x01,0xee\n\t" in rdpkru()
103 asm volatile(".byte 0x0f,0x01,0xef\n\t" in wrpkru()
205 alternative_io(".byte 0x3e; clflush %P0", in clflushopt()
206 ".byte 0x66; clflush %P0", in clflushopt()
213 volatile struct { char x[64]; } *p = __p; in clwb()
216 ".byte 0x3e; clflush (%[pax])", in clwb()
217 ".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */ in clwb()
219 ".byte 0x66, 0x0f, 0xae, 0x30", /* clwb (%%rax) */ in clwb()
230 asm volatile(".byte 0xf, 0x1, 0xe8" ::: "memory"); in serialize()
233 /* The dst parameter must be 64-bytes aligned */
236 const struct { char _[64]; } *__src = src; in movdir64b()
237 struct { char _[64]; } __iomem *__dst = dst; in movdir64b()
250 asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02" in movdir64b()
256 * enqcmds - Enqueue a command in supervisor (CPL0) mode
257 * @dst: destination, in MMIO space (must be 512-bit aligned)
260 * The ENQCMDS instruction allows software to write a 512-bit command to
261 * a 512-bit-aligned special MMIO region that supports the instruction.
268 * returns 0 on success and -EAGAIN on failure.
276 const struct { char _[64]; } *__src = src; in enqcmds()
277 struct { char _[64]; } __iomem *__dst = dst; in enqcmds()
285 asm volatile(".byte 0xf3, 0x0f, 0x38, 0xf8, 0x02, 0x66, 0x90" in enqcmds()
292 return -EAGAIN; in enqcmds()