Lines Matching refs:INTEL_ARCH_EVENT_MASK
96 ((config & INTEL_ARCH_EVENT_MASK) >= INTEL_TD_METRIC_RETIRING) && in is_metric_event()
97 ((config & INTEL_ARCH_EVENT_MASK) <= INTEL_TD_METRIC_MAX); in is_metric_event()
102 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_TD_SLOTS; in is_slots_event()
426 INTEL_ARCH_EVENT_MASK)
432 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
440 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
443 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
447 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
451 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
455 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
495 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
500 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
507 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
512 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
519 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
1230 hw_event = hwc->config & INTEL_ARCH_EVENT_MASK; in intel_pmu_has_bts_period()