Lines Matching +full:0 +full:x6000000
26 /* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
27 * The page copy blockops can use 0x6000000 to 0x8000000.
28 * The 8K TSB is mapped in the 0x8000000 to 0x8400000 range.
29 * The 4M TSB is mapped in the 0x8400000 to 0x8800000 range.
30 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
31 * The vmalloc area spans 0x100000000 to 0x200000000.
33 * we place them right before the OBP area from 0x10000000 to 0xf0000000.
34 * There is a single static kernel PMD which maps from 0x0 to address
35 * 0x400000000.
37 #define TLBTEMP_BASE _AC(0x0000000006000000,UL)
38 #define TSBMAP_8K_BASE _AC(0x0000000008000000,UL)
39 #define TSBMAP_4M_BASE _AC(0x0000000008400000,UL)
40 #define MODULES_VADDR _AC(0x0000000010000000,UL)
41 #define MODULES_LEN _AC(0x00000000e0000000,UL)
42 #define MODULES_END _AC(0x00000000f0000000,UL)
43 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
44 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
45 #define VMALLOC_START _AC(0x0000000100000000,UL)
100 __FILE__, __LINE__, &(e), pmd_val(e), __builtin_return_address(0))
103 __FILE__, __LINE__, &(e), pud_val(e), __builtin_return_address(0))
106 __FILE__, __LINE__, &(e), pgd_val(e), __builtin_return_address(0))
111 #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */
112 #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/
113 #define _PAGE_SPECIAL _AC(0x0200000000000000,UL) /* Special page */
114 #define _PAGE_PMD_HUGE _AC(0x0100000000000000,UL) /* Huge page */
118 #define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */
119 #define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */
120 #define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */
121 #define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */
122 #define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */
123 #define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */
124 #define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */
125 #define _PAGE_SPECIAL_4U _AC(0x0200000000000000,UL) /* Special page */
126 #define _PAGE_PMD_HUGE_4U _AC(0x0100000000000000,UL) /* Huge page */
127 #define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */
128 #define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */
129 #define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */
130 #define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */
131 #define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */
132 #define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */
133 #define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */
134 #define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */
135 #define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */
136 #define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */
137 #define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */
138 #define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */
139 #define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */
140 #define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */
141 #define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */
142 #define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */
143 #define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */
144 #define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */
145 #define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */
146 #define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */
149 #define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */
150 #define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */
151 #define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */
152 #define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */
153 #define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */
154 #define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */
155 #define _PAGE_SPECIAL_4V _AC(0x0200000000000000,UL) /* Special page */
156 #define _PAGE_PMD_HUGE_4V _AC(0x0100000000000000,UL) /* Huge page */
157 #define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */
158 #define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */
159 #define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */
160 #define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */
161 #define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */
163 #define _PAGE_MCD_4V _AC(0x0000000000000200,UL) /* Memory Corruption */
164 #define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */
165 #define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */
166 #define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */
167 #define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */
168 #define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */
169 #define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */
170 #define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */
171 #define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */
172 #define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */
173 #define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */
174 #define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */
175 #define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */
176 #define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */
177 #define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */
178 #define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */
191 #define __P000 __pgprot(0)
192 #define __P001 __pgprot(0)
193 #define __P010 __pgprot(0)
194 #define __P011 __pgprot(0)
195 #define __P100 __pgprot(0)
196 #define __P101 __pgprot(0)
197 #define __P110 __pgprot(0)
198 #define __P111 __pgprot(0)
200 #define __S000 __pgprot(0)
201 #define __S001 __pgprot(0)
202 #define __S010 __pgprot(0)
203 #define __S011 __pgprot(0)
204 #define __S100 __pgprot(0)
205 #define __S101 __pgprot(0)
206 #define __S110 __pgprot(0)
207 #define __S111 __pgprot(0)
240 BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL); in pfn_pte()
261 "\n661: sllx %1, %2, %0\n" in pte_pfn()
262 " srlx %0, %3, %0\n" in pte_pfn()
265 " sllx %1, %4, %0\n" in pte_pfn()
266 " srlx %0, %5, %0\n" in pte_pfn()
281 /* SUN4U: 0x630107ffffffec38 (negated == 0x9cfef800000013c7) in pte_modify()
282 * SUN4V: 0x33ffffffffffee07 (negated == 0xcc000000000011f8) in pte_modify()
291 BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL); in pte_modify()
294 " sethi %%hi(%2), %0\n" in pte_modify()
296 " or %0, %%lo(%2), %0\n" in pte_modify()
298 " or %0, %1, %0\n" in pte_modify()
302 " sethi %%hi(%3), %0\n" in pte_modify()
305 " or %0, %%lo(%3), %0\n" in pte_modify()
308 " or %0, %1, %0\n" in pte_modify()
313 " sethi %%hi(%4), %0\n" in pte_modify()
316 " or %0, %%lo(%4), %0\n" in pte_modify()
319 " or %0, %1, %0\n" in pte_modify()
351 "\n661: andn %0, %2, %0\n" in pgprot_noncached()
352 " or %0, %3, %0\n" in pgprot_noncached()
355 " andn %0, %4, %0\n" in pgprot_noncached()
356 " or %0, %5, %0\n" in pgprot_noncached()
360 " andn %0, %6, %0\n" in pgprot_noncached()
361 " or %0, %5, %0\n" in pgprot_noncached()
364 : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U), in pgprot_noncached()
384 "\n661: sethi %%uhi(%1), %0\n" in __pte_default_huge_mask()
385 " sllx %0, 32, %0\n" in __pte_default_huge_mask()
388 " mov %2, %0\n" in __pte_default_huge_mask()
442 "\n661: or %0, %3, %0\n" in pte_mkdirty()
452 " or %0, %1, %0\n" in pte_mkdirty()
455 : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), in pte_mkdirty()
466 "\n661: andn %0, %3, %0\n" in pte_mkclean()
476 " andn %0, %1, %0\n" in pte_mkclean()
479 : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), in pte_mkclean()
490 "\n661: mov %1, %0\n" in pte_mkwrite()
494 " sethi %%uhi(%2), %0\n" in pte_mkwrite()
495 " sllx %0, 32, %0\n" in pte_mkwrite()
508 "\n661: andn %0, %3, %0\n" in pte_wrprotect()
518 " andn %0, %1, %0\n" in pte_wrprotect()
521 : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U), in pte_wrprotect()
532 "\n661: mov %1, %0\n" in pte_mkold()
536 " sethi %%uhi(%2), %0\n" in pte_mkold()
537 " sllx %0, 32, %0\n" in pte_mkold()
552 "\n661: mov %1, %0\n" in pte_mkyoung()
556 " sethi %%uhi(%2), %0\n" in pte_mkyoung()
557 " sllx %0, 32, %0\n" in pte_mkyoung()
590 "\n661: mov %1, %0\n" in pte_young()
594 " sethi %%uhi(%2), %0\n" in pte_young()
595 " sllx %0, 32, %0\n" in pte_young()
608 "\n661: mov %1, %0\n" in pte_dirty()
612 " sethi %%uhi(%2), %0\n" in pte_dirty()
613 " sllx %0, 32, %0\n" in pte_dirty()
626 "\n661: mov %1, %0\n" in pte_write()
630 " sethi %%uhi(%2), %0\n" in pte_write()
631 " sllx %0, 32, %0\n" in pte_write()
644 "\n661: sethi %%hi(%1), %0\n" in pte_exec()
647 " mov %2, %0\n" in pte_exec()
660 "\n661: and %0, %2, %0\n" in pte_present()
663 " and %0, %3, %0\n" in pte_present()
666 : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V)); in pte_present()
793 return pmd_val(pmd) != 0UL; in pmd_present()
856 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL)
857 #define pud_present(pud) (pud_val(pud) != 0U)
858 #define pud_clear(pudp) (pud_val(*(pudp)) = 0UL)
861 #define p4d_present(p4d) (p4d_val(p4d) != 0U)
862 #define p4d_clear(p4dp) (p4d_val(*(p4dp)) = 0UL)
916 set_pmd_at(mm, addr, pmdp, __pmd(0UL)); in pmdp_huge_get_and_clear()
930 __set_pte_at((mm), (addr), (ptep), (pte), 0)
933 set_pte_at((mm), (addr), (ptep), __pte(0UL))
937 __set_pte_at((mm), (addr), (ptep), __pte(0UL), (fullmm))
983 #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
1002 #define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL)
1037 return 0; in arch_unmap_one()