Lines Matching +full:fifo +full:- +full:depth

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include "microchip-mpfs.dtsi"
12 	#address-cells = <2>;
13 	#size-cells = <2>;
14 	model = "Microchip PolarFire-SoC Icicle Kit";
15 	compatible = "microchip,mpfs-icicle-kit";
26 		stdout-path = "serial0:115200n8";
30 		timebase-frequency = <RTCCLK_FREQ>;
64 	phy-mode = "sgmii";
65 	phy-handle = <&phy0>;
66 	phy0: ethernet-phy@8 {
68 		ti,fifo-depth = <0x01>;
74 	phy-mode = "sgmii";
75 	phy-handle = <&phy1>;
76 	phy1: ethernet-phy@9 {
78 		ti,fifo-depth = <0x01>;