1 // SPDX-License-Identifier: GPL-2.0-or-later
12  * code to detect this card though and disable SMP. --BenH.
17  * Support for DayStar quad CPU cards
18  * Copyright (C) XLR8, Inc. 1994-2000
31 #include <linux/cpu.h>
37 #include <asm/code-patching.h>
89 /* Daystar/XLR8 4-CPU card */
99 #define PSURGE_QUAD_CKSTOP_RDBK	8
115 #define PSURGE_NONE		-1
131 static inline void psurge_set_ipi(int cpu)  in psurge_set_ipi()  argument
135 	if (cpu == 0)  in psurge_set_ipi()
140 		PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_SET, 1 << cpu);  in psurge_set_ipi()
143 static inline void psurge_clr_ipi(int cpu)  in psurge_clr_ipi()  argument
145 	if (cpu > 0) {  in psurge_clr_ipi()
153 			PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_CLR, 1 << cpu);  in psurge_clr_ipi()
162  *  -- paulus.
172 static void smp_psurge_cause_ipi(int cpu)  in smp_psurge_cause_ipi()  argument
174 	psurge_set_ipi(cpu);  in smp_psurge_cause_ipi()
191 	int rc = -ENOMEM;  in psurge_secondary_ipi_init()
203 		pr_err("Failed to setup secondary cpu IPI\n");  in psurge_secondary_ipi_init()
224 	/* bogus is not necessarily cacheline-aligned,  in psurge_quad_probe()
225 	   though I don't suppose that really matters.  -- paulus */  in psurge_quad_probe()
227 		volatile u32 bogus[8];  in psurge_quad_probe()
228 		bogus[(0+i)%8] = 0x00000000;  in psurge_quad_probe()
229 		bogus[(1+i)%8] = 0x55555555;  in psurge_quad_probe()
230 		bogus[(2+i)%8] = 0xFFFFFFFF;  in psurge_quad_probe()
231 		bogus[(3+i)%8] = 0xAAAAAAAA;  in psurge_quad_probe()
232 		bogus[(4+i)%8] = 0x33333333;  in psurge_quad_probe()
233 		bogus[(5+i)%8] = 0xCCCCCCCC;  in psurge_quad_probe()
234 		bogus[(6+i)%8] = 0xCCCCCCCC;  in psurge_quad_probe()
235 		bogus[(7+i)%8] = 0x33333333;  in psurge_quad_probe()
275 	 * The powersurge cpu board can be used in the generation  in smp_psurge_probe()
276 	 * of powermacs that have a socket for an upgradeable cpu card,  in smp_psurge_probe()
282 	 * dual-cpu powersurge board.  -- paulus.  in smp_psurge_probe()
299 		smp_ops->give_timebase = smp_generic_give_timebase;  in smp_psurge_probe()
300 		smp_ops->take_timebase = smp_generic_take_timebase;  in smp_psurge_probe()
304 			/* not a dual-cpu card */  in smp_psurge_probe()
319 	 * secondary cpu(s), and thus there aren't nodes in the  in smp_psurge_probe()
328 	if (ppc_md.progress) ppc_md.progress("smp_psurge_probe - done", 0x352);  in smp_psurge_probe()
333 	unsigned long start = __pa(__secondary_start_pmac_0) + nr * 8;  in smp_psurge_kick_cpu()
367 	 * caller which will try to do udelay's etc... Instead, we wait -here-  in smp_psurge_kick_cpu()
368 	 * for the CPU to callin.  in smp_psurge_kick_cpu()
378 	/* And we do the TB sync here too for standard dual CPU cards */  in smp_psurge_kick_cpu()
395 	if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu - done", 0x354);  in smp_psurge_kick_cpu()
437 /* PowerSurge-style Macs */
498  * G5s enable/disable the timebase via an i2c-connected clock chip.
508 	/* Strangely, the device-tree says address is 0xd2, but darwin  in smp_core99_cypress_tb_freeze()
571 	for_each_node_by_name(cc, "i2c-hwclock") {  in smp_core99_setup_i2c_hwsync()
573 		ok = p && of_device_is_compatible(p, "uni-n-i2c");  in smp_core99_setup_i2c_hwsync()
586 			if (of_device_is_compatible(cc,"pulsar-legacy-slewing")) {  in smp_core99_setup_i2c_hwsync()
635 	pmf_call_function(cpus, "cpu-timebase", &args);  in smp_core99_pfunc_tb_freeze()
659 static void core99_init_caches(int cpu)  in core99_init_caches()  argument
669 	if (cpu == 0) {  in core99_init_caches()
673 		printk("CPU%d: L2CR was %lx\n", cpu, _get_L2CR());  in core99_init_caches()
676 		printk("CPU%d: L2CR set to %lx\n", cpu, core99_l2_cache);  in core99_init_caches()
682 	if (cpu == 0){  in core99_init_caches()
686 		printk("CPU%d: L3CR was %lx\n", cpu, _get_L3CR());  in core99_init_caches()
689 		printk("CPU%d: L3CR set to %lx\n", cpu, core99_l3_cache);  in core99_init_caches()
709 		    of_get_property(cpus, "platform-cpu-timebase", NULL)) {  in smp_core99_setup()
720 		struct device_node *cpu;  in smp_core99_setup()
724 		cpu = of_find_node_by_type(NULL, "cpu");  in smp_core99_setup()
725 		if (cpu != NULL) {  in smp_core99_setup()
726 			tbprop = of_get_property(cpu, "timebase-enable", NULL);  in smp_core99_setup()
729 			of_node_put(cpu);  in smp_core99_setup()
740 		smp_ops->give_timebase = smp_generic_give_timebase;  in smp_core99_setup()
741 		smp_ops->take_timebase = smp_generic_take_timebase;  in smp_core99_setup()
767 	/* Count CPUs in the device-tree */  in smp_core99_probe()
768 	for_each_node_by_type(cpus, "cpu")  in smp_core99_probe()
789 	/* Collect l2cr and l3cr values from CPU 0 */  in smp_core99_probe()
800 		return -ENOENT;  in smp_core99_kick_cpu()
811 	 *   b __secondary_start_pmac_0 + nr*8  in smp_core99_kick_cpu()
813 	target = (unsigned long) __secondary_start_pmac_0 + nr * 8;  in smp_core99_kick_cpu()
819 	/* FIXME: We wait a bit for the CPU to take the exception, I should  in smp_core99_kick_cpu()
821 	 * ideally, all that crap will be done in prom.c and the CPU left  in smp_core99_kick_cpu()
822 	 * in a RAM-based wait loop like CHRP.  in smp_core99_kick_cpu()
849 static int smp_core99_cpu_prepare(unsigned int cpu)  in smp_core99_cpu_prepare()  argument
865 static int smp_core99_cpu_online(unsigned int cpu)  in smp_core99_cpu_online()  argument
884 	/* If we didn't start the second CPU, we must take  in smp_core99_bringup_done()
924 	int cpu = smp_processor_id();  in pmac_cpu_offline_self()  local
928 	pr_debug("CPU%d offline\n", cpu);  in pmac_cpu_offline_self()
929 	generic_set_cpu_dead(cpu);  in pmac_cpu_offline_self()
939 	int cpu = smp_processor_id();  in pmac_cpu_offline_self()  local
950 	printk(KERN_INFO "CPU#%d offline\n", cpu);  in pmac_cpu_offline_self()
951 	generic_set_cpu_dead(cpu);  in pmac_cpu_offline_self()
955 	 * Re-enable interrupts. The NAP code needs to enable them  in pmac_cpu_offline_self()
957 	 * happened while soft-disabled.  in pmac_cpu_offline_self()
997 	np = of_find_node_by_name(NULL, "uni-n");  in pmac_setup_smp()
1009 		 * secondary CPU(s) aren't in the device tree. Various  in pmac_setup_smp()
1013 		int cpu;  in pmac_setup_smp()  local
1015 		for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)  in pmac_setup_smp()
1016 			set_cpu_possible(cpu, true);  in pmac_setup_smp()
1022 	smp_ops->cpu_offline_self = pmac_cpu_offline_self;  in pmac_setup_smp()