96 	int stepped = -1;  in test_ld()
104 	if (stepped == 1 && regs.gpr[5] == a)  in test_ld()
114 	int stepped = -1;  in test_pld()
127 	if (stepped == 1 && regs.gpr[5] == a)  in test_pld()
137 	int stepped = -1;  in test_lwz()
145 	if (stepped == 1 && regs.gpr[5] == a)  in test_lwz()
155 	int stepped = -1;  in test_plwz()
169 	if (stepped == 1 && regs.gpr[5] == a)  in test_plwz()
179 	int stepped = -1;  in test_lwzx()
188 	if (stepped == 1 && regs.gpr[5] == a[2])  in test_lwzx()
198 	int stepped = -1;  in test_std()
206 	if (stepped == 1 && regs.gpr[5] == a)  in test_std()
216 	int stepped = -1;  in test_pstd()
229 	if (stepped == 1 || regs.gpr[5] == a)  in test_pstd()
239 	int stepped = -1;  in test_ldarx_stdcx()
276 	 *  1. Reservation is active and store is performed. In this  in test_ldarx_stdcx()
277 	 *     case cr0.eq bit will be set to 1.  in test_ldarx_stdcx()
281 	if (stepped == 1 && ((regs.gpr[5] == a && (regs.ccr & cr0_eq))  in test_ldarx_stdcx()
295 	} c;  in test_lfsx_stfsx()  local
297 	int stepped = -1;  in test_lfsx_stfsx()
304 	c.a = 123.45;  in test_lfsx_stfsx()
305 	cached_b = c.b;  in test_lfsx_stfsx()
307 	regs.gpr[3] = (unsigned long) &c.a;  in test_lfsx_stfsx()
313 	if (stepped == 1)  in test_lfsx_stfsx()
321 	c.a = 678.91;  in test_lfsx_stfsx()
326 	if (stepped == 1 && c.b == cached_b)  in test_lfsx_stfsx()
338 	} c;  in test_plfs_pstfs()  local
340 	int stepped = -1;  in test_plfs_pstfs()
352 	c.a = 123.45;  in test_plfs_pstfs()
353 	cached_b = c.b;  in test_plfs_pstfs()
355 	regs.gpr[3] = (unsigned long)&c.a;  in test_plfs_pstfs()
360 	if (stepped == 1)  in test_plfs_pstfs()
368 	c.a = 678.91;  in test_plfs_pstfs()
373 	if (stepped == 1 && c.b == cached_b)  in test_plfs_pstfs()
385 	} c;  in test_lfdx_stfdx()  local
387 	int stepped = -1;  in test_lfdx_stfdx()
394 	c.a = 123456.78;  in test_lfdx_stfdx()
395 	cached_b = c.b;  in test_lfdx_stfdx()
397 	regs.gpr[3] = (unsigned long) &c.a;  in test_lfdx_stfdx()
403 	if (stepped == 1)  in test_lfdx_stfdx()
411 	c.a = 987654.32;  in test_lfdx_stfdx()
416 	if (stepped == 1 && c.b == cached_b)  in test_lfdx_stfdx()
428 	} c;  in test_plfd_pstfd()  local
430 	int stepped = -1;  in test_plfd_pstfd()
442 	c.a = 123456.78;  in test_plfd_pstfd()
443 	cached_b = c.b;  in test_plfd_pstfd()
445 	regs.gpr[3] = (unsigned long)&c.a;  in test_plfd_pstfd()
450 	if (stepped == 1)  in test_plfd_pstfd()
458 	c.a = 987654.32;  in test_plfd_pstfd()
463 	if (stepped == 1 && c.b == cached_b)  in test_plfd_pstfd()
501 	} c;  in test_lvx_stvx()  local
503 	int stepped = -1;  in test_lvx_stvx()
510 	cached_b[0] = c.b[0] = 923745;  in test_lvx_stvx()
511 	cached_b[1] = c.b[1] = 2139478;  in test_lvx_stvx()
512 	cached_b[2] = c.b[2] = 9012;  in test_lvx_stvx()
513 	cached_b[3] = c.b[3] = 982134;  in test_lvx_stvx()
515 	regs.gpr[3] = (unsigned long) &c.a;  in test_lvx_stvx()
521 	if (stepped == 1)  in test_lvx_stvx()
529 	c.b[0] = 4987513;  in test_lvx_stvx()
530 	c.b[1] = 84313948;  in test_lvx_stvx()
531 	c.b[2] = 71;  in test_lvx_stvx()
532 	c.b[3] = 498532;  in test_lvx_stvx()
537 	if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&  in test_lvx_stvx()
538 	    cached_b[2] == c.b[2] && cached_b[3] == c.b[3])  in test_lvx_stvx()
558 	} c;  in test_lxvd2x_stxvd2x()  local
560 	int stepped = -1;  in test_lxvd2x_stxvd2x()
567 	cached_b[0] = c.b[0] = 18233;  in test_lxvd2x_stxvd2x()
568 	cached_b[1] = c.b[1] = 34863571;  in test_lxvd2x_stxvd2x()
569 	cached_b[2] = c.b[2] = 834;  in test_lxvd2x_stxvd2x()
570 	cached_b[3] = c.b[3] = 6138911;  in test_lxvd2x_stxvd2x()
572 	regs.gpr[3] = (unsigned long) &c.a;  in test_lxvd2x_stxvd2x()
578 	if (stepped == 1 && cpu_has_feature(CPU_FTR_VSX)) {  in test_lxvd2x_stxvd2x()
590 	c.b[0] = 21379463;  in test_lxvd2x_stxvd2x()
591 	c.b[1] = 87;  in test_lxvd2x_stxvd2x()
592 	c.b[2] = 374234;  in test_lxvd2x_stxvd2x()
593 	c.b[3] = 4;  in test_lxvd2x_stxvd2x()
598 	if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&  in test_lxvd2x_stxvd2x()
599 	    cached_b[2] == c.b[2] && cached_b[3] == c.b[3] &&  in test_lxvd2x_stxvd2x()
624 	} c[2];  in test_lxvp_stxvp()  local
626 	int stepped = -1;  in test_lxvp_stxvp()
638 	cached_b[0] = c[0].b[0] = 18233;  in test_lxvp_stxvp()
639 	cached_b[1] = c[0].b[1] = 34863571;  in test_lxvp_stxvp()
640 	cached_b[2] = c[0].b[2] = 834;  in test_lxvp_stxvp()
641 	cached_b[3] = c[0].b[3] = 6138911;  in test_lxvp_stxvp()
642 	cached_b[4] = c[1].b[0] = 1234;  in test_lxvp_stxvp()
643 	cached_b[5] = c[1].b[1] = 5678;  in test_lxvp_stxvp()
644 	cached_b[6] = c[1].b[2] = 91011;  in test_lxvp_stxvp()
645 	cached_b[7] = c[1].b[3] = 121314;  in test_lxvp_stxvp()
647 	regs.gpr[4] = (unsigned long)&c[0].a;  in test_lxvp_stxvp()
652 	 * let TX=1 Tp=1 RA=4 DQ=0  in test_lxvp_stxvp()
656 	if (stepped == 1 && cpu_has_feature(CPU_FTR_VSX)) {  in test_lxvp_stxvp()
667 	c[0].b[0] = 21379463;  in test_lxvp_stxvp()
668 	c[0].b[1] = 87;  in test_lxvp_stxvp()
669 	c[0].b[2] = 374234;  in test_lxvp_stxvp()
670 	c[0].b[3] = 4;  in test_lxvp_stxvp()
671 	c[1].b[0] = 90;  in test_lxvp_stxvp()
672 	c[1].b[1] = 122;  in test_lxvp_stxvp()
673 	c[1].b[2] = 555;  in test_lxvp_stxvp()
674 	c[1].b[3] = 32144;  in test_lxvp_stxvp()
679 	 * let SX=1 Sp=1 RA=4 DQ=0  in test_lxvp_stxvp()
683 	if (stepped == 1 && cached_b[0] == c[0].b[0] && cached_b[1] == c[0].b[1] &&  in test_lxvp_stxvp()
684 	    cached_b[2] == c[0].b[2] && cached_b[3] == c[0].b[3] &&  in test_lxvp_stxvp()
685 	    cached_b[4] == c[1].b[0] && cached_b[5] == c[1].b[1] &&  in test_lxvp_stxvp()
686 	    cached_b[6] == c[1].b[2] && cached_b[7] == c[1].b[3] &&  in test_lxvp_stxvp()
711 	} c[2];  in test_lxvpx_stxvpx()  local
713 	int stepped = -1;  in test_lxvpx_stxvpx()
725 	cached_b[0] = c[0].b[0] = 18233;  in test_lxvpx_stxvpx()
726 	cached_b[1] = c[0].b[1] = 34863571;  in test_lxvpx_stxvpx()
727 	cached_b[2] = c[0].b[2] = 834;  in test_lxvpx_stxvpx()
728 	cached_b[3] = c[0].b[3] = 6138911;  in test_lxvpx_stxvpx()
729 	cached_b[4] = c[1].b[0] = 1234;  in test_lxvpx_stxvpx()
730 	cached_b[5] = c[1].b[1] = 5678;  in test_lxvpx_stxvpx()
731 	cached_b[6] = c[1].b[2] = 91011;  in test_lxvpx_stxvpx()
732 	cached_b[7] = c[1].b[3] = 121314;  in test_lxvpx_stxvpx()
734 	regs.gpr[3] = (unsigned long)&c[0].a;  in test_lxvpx_stxvpx()
740 	 * let TX=1 Tp=1 RA=3 RB=4  in test_lxvpx_stxvpx()
744 	if (stepped == 1 && cpu_has_feature(CPU_FTR_VSX)) {  in test_lxvpx_stxvpx()
755 	c[0].b[0] = 21379463;  in test_lxvpx_stxvpx()
756 	c[0].b[1] = 87;  in test_lxvpx_stxvpx()
757 	c[0].b[2] = 374234;  in test_lxvpx_stxvpx()
758 	c[0].b[3] = 4;  in test_lxvpx_stxvpx()
759 	c[1].b[0] = 90;  in test_lxvpx_stxvpx()
760 	c[1].b[1] = 122;  in test_lxvpx_stxvpx()
761 	c[1].b[2] = 555;  in test_lxvpx_stxvpx()
762 	c[1].b[3] = 32144;  in test_lxvpx_stxvpx()
767 	 * let SX=1 Sp=1 RA=3 RB=4  in test_lxvpx_stxvpx()
771 	if (stepped == 1 && cached_b[0] == c[0].b[0] && cached_b[1] == c[0].b[1] &&  in test_lxvpx_stxvpx()
772 	    cached_b[2] == c[0].b[2] && cached_b[3] == c[0].b[3] &&  in test_lxvpx_stxvpx()
773 	    cached_b[4] == c[1].b[0] && cached_b[5] == c[1].b[1] &&  in test_lxvpx_stxvpx()
774 	    cached_b[6] == c[1].b[2] && cached_b[7] == c[1].b[3] &&  in test_lxvpx_stxvpx()
800 	} c[2];  in test_plxvp_pstxvp()  local
802 	int stepped = -1;  in test_plxvp_pstxvp()
812 	cached_b[0] = c[0].b[0] = 18233;  in test_plxvp_pstxvp()
813 	cached_b[1] = c[0].b[1] = 34863571;  in test_plxvp_pstxvp()
814 	cached_b[2] = c[0].b[2] = 834;  in test_plxvp_pstxvp()
815 	cached_b[3] = c[0].b[3] = 6138911;  in test_plxvp_pstxvp()
816 	cached_b[4] = c[1].b[0] = 1234;  in test_plxvp_pstxvp()
817 	cached_b[5] = c[1].b[1] = 5678;  in test_plxvp_pstxvp()
818 	cached_b[6] = c[1].b[2] = 91011;  in test_plxvp_pstxvp()
819 	cached_b[7] = c[1].b[3] = 121314;  in test_plxvp_pstxvp()
822 	regs.gpr[3] = (unsigned long)&c[0].a;  in test_plxvp_pstxvp()
827 	 * let RA=3 R=0 D=d0||d1=0 R=0 Tp=1 TX=1  in test_plxvp_pstxvp()
832 	if (stepped == 1 && cpu_has_feature(CPU_FTR_VSX)) {  in test_plxvp_pstxvp()
843 	c[0].b[0] = 21379463;  in test_plxvp_pstxvp()
844 	c[0].b[1] = 87;  in test_plxvp_pstxvp()
845 	c[0].b[2] = 374234;  in test_plxvp_pstxvp()
846 	c[0].b[3] = 4;  in test_plxvp_pstxvp()
847 	c[1].b[0] = 90;  in test_plxvp_pstxvp()
848 	c[1].b[1] = 122;  in test_plxvp_pstxvp()
849 	c[1].b[2] = 555;  in test_plxvp_pstxvp()
850 	c[1].b[3] = 32144;  in test_plxvp_pstxvp()
855 	 * let RA=3 D=d0||d1=0 R=0 Sp=1 SX=1  in test_plxvp_pstxvp()
861 	if (stepped == 1 && cached_b[0] == c[0].b[0] && cached_b[1] == c[0].b[1] &&  in test_plxvp_pstxvp()
862 	    cached_b[2] == c[0].b[2] && cached_b[3] == c[0].b[3] &&  in test_plxvp_pstxvp()
863 	    cached_b[4] == c[1].b[0] && cached_b[5] == c[1].b[1] &&  in test_plxvp_pstxvp()
864 	    cached_b[6] == c[1].b[2] && cached_b[7] == c[1].b[3] &&  in test_plxvp_pstxvp()
911 	} subtests[MAX_SUBTESTS + 1];
916 #define SI_MAX (BIT(33) - 1)
917 #define SI_UMAX (BIT(34) - 1)
937 				.descr = "BFA = 1, CR = GT",
938 				.instr = TEST_SETB(20, 1),
1331 				.descr = "RA = 1L, RB = 0",
1335 					.gpr[21] = 1L,
1361 				.descr = "RA = 1L, RB = 0",
1365 					.gpr[21] = 1L,
1392 				.descr = "RA = 1L, RB = 0",
1396 					.gpr[21] = 1L,
1409 				.descr = "RA = LONG_MAX - 1, RB = LONG_MAX",
1412 					.gpr[21] = LONG_MAX - 1,
1417 				.descr = "RA = LONG_MIN + 1, RB = LONG_MIN",
1421 					.gpr[21] = LONG_MIN + 1,
1440 				.descr = "RA = 1L, RB = 0",
1444 					.gpr[21] = 1L,
1457 				.descr = "RA = LONG_MAX - 1, RB = LONG_MAX",
1460 					.gpr[21] = LONG_MAX - 1,
1465 				.descr = "RA = LONG_MIN + 1, RB = LONG_MIN",
1469 					.gpr[21] = LONG_MIN + 1,
1575 				.descr = "RA is r0, SI = 0, R = 1",
1576 				.instr = TEST_PADDI(21, 0, 0, 1),
1582 				.descr = "RA is r0, SI = SI_MIN, R = 1",
1583 				.instr = TEST_PADDI(21, 0, SI_MIN, 1),
1588 			/* Invalid instruction form with R = 1 and RA != 0 */
1590 				.descr = "RA = R22(0), SI = 0, R = 1",
1591 				.instr = TEST_PADDI(21, 22, 0, 1),
1616 	if (analysed != 1 || GETTYPE(op.type) != COMPUTE) {  in emulate_compute_instr()
1622 	if (analysed == 1 && negative)  in emulate_compute_instr()