25 #define V0		2  macro
233 	uasm_i_mfc0(&p, V0, C0_STATUS);  in kvm_mips_build_vcpu_run()
234 	UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1);  in kvm_mips_build_vcpu_run()
272 	uasm_i_andi(&p, V0, V0, ST0_IM);  in kvm_mips_build_vcpu_run()
273 	uasm_i_or(&p, K0, K0, V0);  in kvm_mips_build_vcpu_run()
648 	uasm_i_mfc0(&p, V0, C0_STATUS);  in kvm_mips_build_exit()
651 	uasm_i_or(&p, K0, V0, AT);  in kvm_mips_build_exit()
666 		uasm_i_and(&p, V1, V0, AT);  in kvm_mips_build_exit()
738 	uasm_i_and(&p, V0, V0, AT);  in kvm_mips_build_exit()
740 	uasm_i_or(&p, V0, V0, AT);  in kvm_mips_build_exit()
742 	uasm_i_ori(&p, V0, V0, ST0_SX | ST0_UX);  in kvm_mips_build_exit()
744 	uasm_i_mtc0(&p, V0, C0_STATUS);  in kvm_mips_build_exit()
824 	uasm_i_andi(&p, T0, V0, RESUME_HOST);  in kvm_mips_build_ret_from_exit()
900 	uasm_i_sra(&p, K0, V0, 2);  in kvm_mips_build_ret_to_host()
901 	uasm_i_move(&p, V0, K0);  in kvm_mips_build_ret_to_host()